Technology-Independent Local Mismatch Estimation Using Precomputed Lookup Tables

This paper revisits the precomputed lookup table (LUT) design methodology to accommodate an estimation technique for local mismatch. The presented methodology restores the design intuition regarding mismatch in the early design phases without relying on lengthy Monte Carlo mismatch simulations or th...

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Published in2025 21st International Conference on Synthesis, Modeling, Analysis and Simulation Methods, and Applications to Circuits Design (SMACD) pp. 1 - 4
Main Authors Khattab, Kareem H., Wei, Muh-Dey, Negra, Renato
Format Conference Proceeding
LanguageEnglish
Published IEEE 07.07.2025
Subjects
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ISSN2575-4890
DOI10.1109/SMACD65553.2025.11092134

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Abstract This paper revisits the precomputed lookup table (LUT) design methodology to accommodate an estimation technique for local mismatch. The presented methodology restores the design intuition regarding mismatch in the early design phases without relying on lengthy Monte Carlo mismatch simulations or the need for technology-dependent mismatch fitting parameters. The estimation method employs the Pelgrom mismatch model and precomputed gm/ID LUTs to systematically model random threshold voltage variations across all dc biasing conditions for MOSFETs. The methodology offers significantly faster predictions for mean and standard deviation errors within 1% of those obtained from SPICE Monte Carlo simulations. Different current mirror designs are demonstrated by leveraging the proposed methodology in a 22nm FDSOI technology.
AbstractList This paper revisits the precomputed lookup table (LUT) design methodology to accommodate an estimation technique for local mismatch. The presented methodology restores the design intuition regarding mismatch in the early design phases without relying on lengthy Monte Carlo mismatch simulations or the need for technology-dependent mismatch fitting parameters. The estimation method employs the Pelgrom mismatch model and precomputed gm/ID LUTs to systematically model random threshold voltage variations across all dc biasing conditions for MOSFETs. The methodology offers significantly faster predictions for mean and standard deviation errors within 1% of those obtained from SPICE Monte Carlo simulations. Different current mirror designs are demonstrated by leveraging the proposed methodology in a 22nm FDSOI technology.
Author Negra, Renato
Wei, Muh-Dey
Khattab, Kareem H.
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Snippet This paper revisits the precomputed lookup table (LUT) design methodology to accommodate an estimation technique for local mismatch. The presented methodology...
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SubjectTerms Analytical models
Design methodology
Estimation
gm/ID
Integrated circuit modeling
LUT
Mismatch Modeling
Monte Carlo
Monte Carlo methods
MOSFET
Process Variation
Semiconductor device modeling
Table lookup
Threshold voltage
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Title Technology-Independent Local Mismatch Estimation Using Precomputed Lookup Tables
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