Accelerating OTA Circuit Design: Transistor Sizing Based on a Transformer Model and Precomputed Lookup Tables - Ghosh, Subhadip; Gebru, Endalk Y.; Kashyap, Chandramouli V.; Harjani, Ramesh; Sapatnekar, Sachin S. (Proceedings - Design, Automation, and Test in Europe Conference and Exhibition, 2025)
Keywords: Computational efficiency; Computational modeling; Integrated circuit modeling; SPICE; Tokenization; Topology; Training; Transconductance; Transformers; Transistors