A hardware/software co-design architecture for ultrasonic flaw detection with Hidden Markov Model and Wavelet Transform

• Published in: IEEE International Ultrasonics Symposium (Online) pp. 1 - 4
• Main Authors: Virupakshappa, Kushal, Oruklu, Erdal
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.09.2017
• Subjects: Acoustics; Algorithm design and analysis; Discrete Wavelet Transform; Discrete wavelet transforms; Field Programmable Gate Array; Field programmable gate arrays; Hardware; Hidden Markov Model; Hidden Markov models; NDE; Training
• ISSN: 1948-5727
• DOI: 10.1109/ULTSYM.2017.8091886

This work presents an embedded hardware architecture for real-time ultrasonic NDE applications that incorporate Hidden Markov Model (HMM) based statistical signal methods. Proposed algorithm is a combination of Discrete Wavelet Transform (DWT) for pre-processing A-scan signals and HMM for classification of the flaw presence. For this study, a MicroZed FPGA with Xilinx Zynq-7020 System-on-Chip (SoC) is chosen for the hardware implementation. A hardware/software approach is used for maximizing the resource usage and efficiency. Wavelet transform has been implemented on the ARM CPU core while the HMM has been implemented on FPGA fabric. Results confirm that the algorithm is feasible for real-time implementation on this low-cost SoC, with an execution time under 40ms.