Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-Level Synthesis - Oppermann, Julian; Reuter-Oppermann, Melanie; Sommer, Lukas; Sinnen, Oliver; Koch, Andreas (2018 28th International Conference on Field Programmable Logic and Applications (FPL), 2018)
Keywords: complexity reduction; Delays; high level synthesis; modulo scheduling; Optimal scheduling; Processor scheduling; Runtime; Schedules; Throughput; VLIW