A stress-life methodology for ball grid array lead-free and tin-lead solder interconnects under impact conditions
Portable electronic products are often subject to impact or shock during use which leads to failures of the external housing, internal electronic components, package-to-board interconnects, and liquid crystal display panels. Moreover, the introduction of lead-free solder to the electronics industry...
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| Published in | 2005 International Conference on Thermal, Mechanical and Multiphysics Simulation and Experience in Micro-electronics and Micro-systems pp. 277 - 284 |
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| Main Authors | , , , , |
| Format | Conference Proceeding |
| Language | English |
| Published |
IEEE
2005
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| Subjects | |
| Online Access | Get full text |
| ISBN | 9780780390621 0780390628 |
| DOI | 10.1109/ESIME.2005.1502814 |
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| Abstract | Portable electronic products are often subject to impact or shock during use which leads to failures of the external housing, internal electronic components, package-to-board interconnects, and liquid crystal display panels. Moreover, the introduction of lead-free solder to the electronics industry will bring additional design implications for future generations of mobile information and communication technology (ICT) applications. In this paper, drop tests performed on printed circuit boards (PCBs) populated with ball grid arrays (BGAs) are reported. During testing, measurements from strain gauges were recorded using a high-speed data acquisition system. Electrical continuity through each package was monitored during the impact events in order to detect failure of package-to-board interconnects. Life distributions were established for both a lead-free and a tin-lead solder for various drop heights. The explicit finite element method (FEM) was employed to approximate the peel stress at the critical solder joint and a stress-life model was then established for both solders. Finally, failure analysis was carried out using microsection techniques, scanning electron microscopy (SEM), and energy dispersive spectroscopy (EDS). It was found that, for board level drop testing, different failure mechanisms can occur for different drop heights and that there is a considerable difference between the lead-free solder characteristic life and the tin-lead solder characteristic life. |
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| AbstractList | Portable electronic products are often subject to impact or shock during use which leads to failures of the external housing, internal electronic components, package-to-board interconnects, and liquid crystal display panels. Moreover, the introduction of lead-free solder to the electronics industry will bring additional design implications for future generations of mobile information and communication technology (ICT) applications. In this paper, drop tests performed on printed circuit boards (PCBs) populated with ball grid arrays (BGAs) are reported. During testing, measurements from strain gauges were recorded using a high-speed data acquisition system. Electrical continuity through each package was monitored during the impact events in order to detect failure of package-to-board interconnects. Life distributions were established for both a lead-free and a tin-lead solder for various drop heights. The explicit finite element method (FEM) was employed to approximate the peel stress at the critical solder joint and a stress-life model was then established for both solders. Finally, failure analysis was carried out using microsection techniques, scanning electron microscopy (SEM), and energy dispersive spectroscopy (EDS). It was found that, for board level drop testing, different failure mechanisms can occur for different drop heights and that there is a considerable difference between the lead-free solder characteristic life and the tin-lead solder characteristic life. |
| Author | Punch, J.M. Ryan, C. Rodgers, B.A. Heaslip, G.M. Reid, M. |
| Author_xml | – sequence: 1 givenname: G.M. surname: Heaslip fullname: Heaslip, G.M. organization: Stokes Res. Inst., Limerick Univ., Ireland – sequence: 2 givenname: J.M. surname: Punch fullname: Punch, J.M. organization: Stokes Res. Inst., Limerick Univ., Ireland – sequence: 3 givenname: B.A. surname: Rodgers fullname: Rodgers, B.A. organization: Stokes Res. Inst., Limerick Univ., Ireland – sequence: 4 givenname: C. surname: Ryan fullname: Ryan, C. organization: Stokes Res. Inst., Limerick Univ., Ireland – sequence: 5 givenname: M. surname: Reid fullname: Reid, M. organization: Stokes Res. Inst., Limerick Univ., Ireland |
| BookMark | eNotkMFOAyEURUnURK39Ad3wA1MfMMwMy6ap2qTGhbpuGHhUDIUKuOjfW7U3J7nJWdzFvSbnMUUk5JbBjDFQ98vX1fNyxgHkjEngA2vPyFT1AxwRCjrOLsm0lE84ppVtC_KKfM1pqRlLaYJ3SHdYP5JNIW0P1KVMRx0C3WZvqc5ZH2hAbRuXEamOllYfm19DSwoWM_WxYjYpRjS10O_453Z7bSo9WuurT7HckAunQ8HpqSfk_WH5tnhq1i-Pq8V83XjWy9rYTndGjUKrsRtb7gwoIYaOWSa442rouWlBaDAcmNWGc91L5MKp3gqQvRATcve_6xFxs89-p_NhczpG_AANg1v2 |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1109/ESIME.2005.1502814 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE Electronic Library (IEL) IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE/IET Electronic Library url: https://proxy.k.utb.cz/login?url=https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| EndPage | 284 |
| ExternalDocumentID | 1502814 |
| Genre | orig-research |
| GroupedDBID | 6IE 6IF 6IK 6IL 6IN AAJGR AARBI AAWTH ALMA_UNASSIGNED_HOLDINGS BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK OCL RIE RIL |
| ID | FETCH-LOGICAL-i175t-d6a6c9b3a9b6b42fc0933861d132f29872c403a0c201dac22a75e23f97d305733 |
| IEDL.DBID | RIE |
| ISBN | 9780780390621 0780390628 |
| IngestDate | Wed Aug 27 02:42:34 EDT 2025 |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-i175t-d6a6c9b3a9b6b42fc0933861d132f29872c403a0c201dac22a75e23f97d305733 |
| PageCount | 8 |
| ParticipantIDs | ieee_primary_1502814 |
| PublicationCentury | 2000 |
| PublicationDate | 20050000 |
| PublicationDateYYYYMMDD | 2005-01-01 |
| PublicationDate_xml | – year: 2005 text: 20050000 |
| PublicationDecade | 2000 |
| PublicationTitle | 2005 International Conference on Thermal, Mechanical and Multiphysics Simulation and Experience in Micro-electronics and Micro-systems |
| PublicationTitleAbbrev | ESIME |
| PublicationYear | 2005 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| SSID | ssj0000454405 |
| Score | 1.3508202 |
| Snippet | Portable electronic products are often subject to impact or shock during use which leads to failures of the external housing, internal electronic components,... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 277 |
| SubjectTerms | Circuit testing Electric shock Electronic components Electronics packaging Environmentally friendly manufacturing techniques Failure analysis Integrated circuit interconnections Lead Scanning electron microscopy Strain measurement |
| Title | A stress-life methodology for ball grid array lead-free and tin-lead solder interconnects under impact conditions |
| URI | https://ieeexplore.ieee.org/document/1502814 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV3PS8MwFA5zJ08qm_ibHDyarUu7Nj2KbExhIuhgt5HkpVIsndb2oH-9L0k3UTx4a9-hhBBevvf1fd8j5BJAScz6mkkOCYsiI5jEtMcsFEk0JJHwXb738WwR3S3Hyw652mphjDGu-cwM7KP7lw9r3ViqbIjghQs7tXonEbHXam35FGslh-DDVeYiCK39rmgNdjbvo41oJkiHk8fb-cRTKu1Xf4xXcbfLdI_MN-vyTSUvg6ZWA_35y7LxvwvfJ_1vHR992N5QB6Rjyh55u6ZeIMKKPDPUj5B25DpFAEuVLAr6XOVAZVXJD1rgIWBZZQyVJdA6L5mNUDyyYCpq3SYqbZtldP1OrSANY054STEKvh-sTxbTydPNjLWDF1iOaKJmEMtYpyqUqYpVxDNtaQ8RjwBL14ynIuE6CkIZaEQPIDXnMhkbHmZpAqEzWDwk3XJdmiNCBSYJjiAniLD0STnIIBSgzTg02UioDI5Jz27X6tV7a6zanTr5O3xKdp11qqNAzki3rhpzjqCgVhfuNHwBCg-zGQ |
| linkProvider | IEEE |
| linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwjV09T8MwELWqMsAEqEV844ERt6njJM6IUKsW2gqJVupW2T4HRUQphHSAX4_tpEUgBrbkhsiyrPO7l3vvELoGkMJkfUUEhYgwpjkRJu0RC0UiBRHjVZfvNBzO2f0iWDTQzVYLo7V2zWe6Yx_dv3xYqbWlyroGvFBup1bvBIyxoFJrbRkVayZn4IerzbnnWwNeXlvsbN57G9mMF3f7T6NJvyJV6u_-GLDi7pfBPppsVla1lbx01qXsqM9fpo3_XfoBan8r-fDj9o46RA2dt9DbLa4kIiRLE42rIdKOXscGwmIpsgw_FylgURTiA2fmGJCk0BqLHHCZ5sRGsDm0oAts_SYKZdtlVPmOrSTNxJz0EpsoVB1hbTQf9Gd3Q1KPXiCpwRMlgVCEKpa-iGUoGU2UJT542ANTvCY05hFVzPOFpwx-AKEoFVGgqZ_EEfjOYvEINfNVro8R5iZNUANzPGaKn5iC8HwOSge-TnpcJnCCWna7lq-Vu8ay3qnTv8NXaHc4m4yX49H04QztOSNVR4ico2ZZrPWFgQilvHQn4wucqbZm |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2005+International+Conference+on+Thermal%2C+Mechanical+and+Multiphysics+Simulation+and+Experience+in+Micro-electronics+and+Micro-systems&rft.atitle=A+stress-life+methodology+for+ball+grid+array+lead-free+and+tin-lead+solder+interconnects+under+impact+conditions&rft.au=Heaslip%2C+G.M.&rft.au=Punch%2C+J.M.&rft.au=Rodgers%2C+B.A.&rft.au=Ryan%2C+C.&rft.date=2005-01-01&rft.pub=IEEE&rft.isbn=9780780390621&rft.spage=277&rft.epage=284&rft_id=info:doi/10.1109%2FESIME.2005.1502814&rft.externalDocID=1502814 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780390621/lc.gif&client=summon&freeimage=true |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780390621/mc.gif&client=summon&freeimage=true |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780780390621/sc.gif&client=summon&freeimage=true |