High-Performance, Low-Power Resonant Clocking: Embedded tutorial - Guthaus, M. R.; Taskin, B. (2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2012)
Clock distribution networks consume a significant portion of on-chip power. Traditional buffered clock distribution power is limited by frequency, capacitance, and activity rates. Resonant clock distributions can reduce this power by "recycling" energy on-chip and reducing the overall clock power. This tutorial introduces recent techniques for distributed-LC, traveling wave, and standing wave resonant clock distributions. In particular, the tutorial discusses the recent developments and open research problems. The tutorial covers both circuits, computer-aided design algorithms and methodologies for resonant clocking.