High-Performance, Low-Power Resonant Clocking: Embedded tutorial

Clock distribution networks consume a significant portion of on-chip power. Traditional buffered clock distribution power is limited by frequency, capacitance, and activity rates. Resonant clock distributions can reduce this power by "recycling" energy on-chip and reducing the overall cloc...

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Bibliographic Details
Published in2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) pp. 742 - 745
Main Authors Guthaus, M. R., Taskin, B.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.11.2012
Subjects
Clocks
Computers
Conferences
Design automation
Oscillators
Synchronization
System-on-a-chip
Online AccessGet full text
ISSN1092-3152

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Summary:Clock distribution networks consume a significant portion of on-chip power. Traditional buffered clock distribution power is limited by frequency, capacitance, and activity rates. Resonant clock distributions can reduce this power by "recycling" energy on-chip and reducing the overall clock power. This tutorial introduces recent techniques for distributed-LC, traveling wave, and standing wave resonant clock distributions. In particular, the tutorial discusses the recent developments and open research problems. The tutorial covers both circuits, computer-aided design algorithms and methodologies for resonant clocking.
ISSN:1092-3152