Software/hardware framework for generating parallel Gaussian random numbers based on the Monty Python method

We present a hardware architecture for efficient implementation of a Gaussian random number generator (GRNG), using the Monty Python method. To maximize the performance/complexity efficiency, an efficient word-length optimization model is proposed to find out both the optimal integer and fractional...

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Published in2012 International Conference on Field-Programmable Technology pp. 190 - 197
Main Authors Yuan Li, Chow, P., Jiang Jiang, Minxuan Zhang, Shaojun Wei
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.12.2012
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ISBN1467328464
9781467328463
DOI10.1109/FPT.2012.6412133

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Abstract We present a hardware architecture for efficient implementation of a Gaussian random number generator (GRNG), using the Monty Python method. To maximize the performance/complexity efficiency, an efficient word-length optimization model is proposed to find out both the optimal integer and fractional word-lengths for signals. Experimental results show that our optimized Fixed-Point design achieves a throughput of almost 1 sample-per-cycle and runs as fast as 375.9 MHz on a Xilinx XC6VLX240T FPGA device. This performance is 23.4-fold faster than a dedicated software version running on a 2.67-GHz Intel core i5 processor. It takes 1976 LUTs, 1785 Flip-Flops, 12 BRAMs and 35 DSPs, which is only about 1% of the device as well as a great reduction compared to its corresponding Floating-Point implementations. Furthermore, we develop a framework that is capable of partitioning the Gaussian distribution stream into an arbitrary number of parallel sub-streams. With support from software, this framework can obtain speedup roughly linearly with the number of parallel cores. The quality of the variables produced by our design are verified via the standard Gaussian statistical test suit, the chi-square (X 2 ) test.
AbstractList We present a hardware architecture for efficient implementation of a Gaussian random number generator (GRNG), using the Monty Python method. To maximize the performance/complexity efficiency, an efficient word-length optimization model is proposed to find out both the optimal integer and fractional word-lengths for signals. Experimental results show that our optimized Fixed-Point design achieves a throughput of almost 1 sample-per-cycle and runs as fast as 375.9 MHz on a Xilinx XC6VLX240T FPGA device. This performance is 23.4-fold faster than a dedicated software version running on a 2.67-GHz Intel core i5 processor. It takes 1976 LUTs, 1785 Flip-Flops, 12 BRAMs and 35 DSPs, which is only about 1% of the device as well as a great reduction compared to its corresponding Floating-Point implementations. Furthermore, we develop a framework that is capable of partitioning the Gaussian distribution stream into an arbitrary number of parallel sub-streams. With support from software, this framework can obtain speedup roughly linearly with the number of parallel cores. The quality of the variables produced by our design are verified via the standard Gaussian statistical test suit, the chi-square (X 2 ) test.
Author Minxuan Zhang
Chow, P.
Jiang Jiang
Shaojun Wei
Yuan Li
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  surname: Shaojun Wei
  fullname: Shaojun Wei
  email: wsj@tsinghua.edu.cn
  organization: Inst. of Microelectron., Tsinghua Univ., Beijing, China
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Snippet We present a hardware architecture for efficient implementation of a Gaussian random number generator (GRNG), using the Monty Python method. To maximize the...
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StartPage 190
SubjectTerms Algorithm design and analysis
Computer architecture
Generators
Hardware
Optimization
Polynomials
Software
Title Software/hardware framework for generating parallel Gaussian random numbers based on the Monty Python method
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