Green Queue: Customized Large-Scale Clock Frequency Scaling

• Published in: 2012 International Conference on Cloud and Green Computing pp. 260 - 267
• Main Authors: Tiwari, A., Laurenzano, M., Peraza, J., Carrington, L., Snavely, A.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.11.2012
• Subjects: Clocks; Green products; Hardware; Load modeling; Power measurement; Queueing analysis; Runtime
• ISBN: 1467330272; 9781467330275
• DOI: 10.1109/CGC.2012.62

We examine the scalability of a set of techniques related to Dynamic Voltage-Frequency Scaling (DVFS) on HPC systems to reduce the energy consumption of scientific applications through an application-aware analysis and runtime framework, Green Queue. Green Queue supports making CPU clock frequency changes in response to intra-node and inter-node observations about application behavior. Our intra-node approach reduces CPU clock frequencies and therefore power consumption while CPUs lacks computational work due to inefficient data movement. Our inter-node approach reduces clock frequencies for MPI ranks that lack computational work. We investigate these techniques on a set of large scientific applications on 1024 cores of Gordon, an Intel Sandy bridge-based supercomputer at the San Diego Supercomputer Center. Our optimal intra-node technique showed an average measured energy savings of 10.6% and a maximum of 21.0% over regular application runs. Our optimal inter-node technique showed an average 17.4% and a maximum of 31.7% energy savings.