Design and FPGA implementation of novel radar Adaptive Post detection Integration algorithm

In the present work, design and Field Programmable Gate Array (FPGA) implementation of a new Adaptive Post detection Integration (API) algorithm, designated as Conditioned Adaptive Post detection Integration (C-API), is proposed. The proposed C-API algorithm overcomes the problem of azimuth resoluti...

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Bibliographic Details
Published in2012 IEEE Radar Conference pp. 0128 - 0132
Main Authors Ahmed, F. M., Kamel, H., Fahmy, A., Salem, I. A.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.05.2012
Subjects
ABI
Algorithm design and analysis
API
Azimuth
C-API
Detection
Field programmable gate arrays
FPGA
Interference
Mathematical model
Radar detection
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ISBN1467306568
9781467306560
ISSN1097-5659
DOI10.1109/RADAR.2012.6212124

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Summary:In the present work, design and Field Programmable Gate Array (FPGA) implementation of a new Adaptive Post detection Integration (API) algorithm, designated as Conditioned Adaptive Post detection Integration (C-API), is proposed. The proposed C-API algorithm overcomes the problem of azimuth resolution degradation in the traditional API, especially for high signal to noise ratios (SNRs), and gives a robust performance against asynchronous pulse interference without affecting the detection capability of the traditional API. Computer simulations and experimental measurements are provided to validate the superiority of the proposed C-API algorithm against the traditional API and the Adaptive Binary Integrator (ABI).
ISBN:1467306568
9781467306560
ISSN:1097-5659
DOI:10.1109/RADAR.2012.6212124