Roy, S. (2005). A sub-word-parallel Galois field multiply-accumulate unit for digital signal processors. 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 1626-1629 Vol. 2. https://doi.org/10.1109/ISCAS.2005.1464915
Chicago Style (17th ed.) CitationRoy, S. "A Sub-word-parallel Galois Field Multiply-accumulate Unit for Digital Signal Processors." 2005 IEEE International Symposium on Circuits and Systems (ISCAS) 2005: 1626-1629 Vol. 2. https://doi.org/10.1109/ISCAS.2005.1464915.
MLA (9th ed.) CitationRoy, S. "A Sub-word-parallel Galois Field Multiply-accumulate Unit for Digital Signal Processors." 2005 IEEE International Symposium on Circuits and Systems (ISCAS), 2005, pp. 1626-1629 Vol. 2, https://doi.org/10.1109/ISCAS.2005.1464915.
Warning: These citations may not always be 100% accurate.