Digital background calibration for pipelined SAR ADC based on LMS algorithm

In this paper, a digital background error-correction technique for pipelined successive approximation analogue-to-digital converter (SAR ADC) based on Least Mean Square (LMS) algorithm is presented. This technique uses a slow but accurate ADC as a reference ADC and combines with LMS algorithm to cal...

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Bibliographic Details
Published in2013 IEEE International Conference of Electron Devices and Solid-State Circuits pp. 1 - 2
Main Authors Qing Lei, ZhaoHui Wu, Bin Li, HaiJun Wu
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.06.2013
Subjects
Algorithm design and analysis
digital background calibration
Least squares approximations
LMS algorithm
pipelined SAR ADC
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DOI10.1109/EDSSC.2013.6628208

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Summary:In this paper, a digital background error-correction technique for pipelined successive approximation analogue-to-digital converter (SAR ADC) based on Least Mean Square (LMS) algorithm is presented. This technique uses a slow but accurate ADC as a reference ADC and combines with LMS algorithm to calibrate the capacitor mismatch, gain error, reference voltage offset error of the inaccurate pipelined SAR ADC. The simulation validates the effectiveness of this technique for a pipelined SAR ADC with 16 bit resolution. The effective number of bits(ENOB) is improved from 10.31 bits to 15.66 bits.
DOI:10.1109/EDSSC.2013.6628208