Simultaneous Multi-channel Data Acquisition and Storing System

In this paper, a novel simultaneous multichannel data acquisition system is proposed. Analog signals are applied to an analog multiplexer with a single analog to digital converter. The target technology of implementing the proposed design is the field programmable gate array (FPGA). The analog-to-di...

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Published inInternational Conference of Computing in Engineering, Science and Information pp. 233 - 236
Main Authors Abdallah, M., Elkeelany, O.
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.04.2009
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ISBN9780769535388
0769535380
DOI10.1109/ICC.2009.17

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Abstract In this paper, a novel simultaneous multichannel data acquisition system is proposed. Analog signals are applied to an analog multiplexer with a single analog to digital converter. The target technology of implementing the proposed design is the field programmable gate array (FPGA). The analog-to-digital converter interface and the flash memory driver are implemented in the FPGA using hardware description language. The synthesized prototype used only 11% of the total logic elements (of Altera CycloneII, EP2C35F672C-6N FPGA) and 15% of its total memory bits. The worst-case prorogation delay observed for the system is 12.04 ns, which is less than the 50 MHz clock period of 20 ns. The Cyclone-II FPGA consumes power as low as 12 mW. The SNR of the recorded signal is 70 dB. The proposed system can be used in various applications that require simultaneous multi-channel data acquisition system such as biomedical engineering.
AbstractList In this paper, a novel simultaneous multichannel data acquisition system is proposed. Analog signals are applied to an analog multiplexer with a single analog to digital converter. The target technology of implementing the proposed design is the field programmable gate array (FPGA). The analog-to-digital converter interface and the flash memory driver are implemented in the FPGA using hardware description language. The synthesized prototype used only 11% of the total logic elements (of Altera CycloneII, EP2C35F672C-6N FPGA) and 15% of its total memory bits. The worst-case prorogation delay observed for the system is 12.04 ns, which is less than the 50 MHz clock period of 20 ns. The Cyclone-II FPGA consumes power as low as 12 mW. The SNR of the recorded signal is 70 dB. The proposed system can be used in various applications that require simultaneous multi-channel data acquisition system such as biomedical engineering.
Author Abdallah, M.
Elkeelany, O.
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  organization: Electr. & Comput. Eng. Dept., Tennessee Technol. Univ., Cookeville, TN, USA
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Snippet In this paper, a novel simultaneous multichannel data acquisition system is proposed. Analog signals are applied to an analog multiplexer with a single analog...
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StartPage 233
SubjectTerms ADC
Analog-digital conversion
Data acquisition
Field programmable analog arrays
Field programmable gate arrays
Flash memory
FPGA
Hardware design languages
Multiplexing
Programmable logic arrays
Prototypes
Real-time
SD card
Signal synthesis
Title Simultaneous Multi-channel Data Acquisition and Storing System
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