A novel CMOS charge-pump circuit with positive feedback for PLL applications - Juarez-Hernandez, E.; Diaz-Sanchez, A. (2001 8th International Conference on Electronics, Circuits and Systems, 2001)
The design and simulation of a novel CMOS charge-pump circuit for PLL applications is presented. The proposed circuit makes use of positive feedback to increase the switching speed and current reuse to minimize the power consumption. H-SPICE simulations for a 0.35 /spl mu/m AMS technology show the potential of the proposed structure for high-frequency applications.