A novel clock deskew method by linear programming - Hashizume, Y.; Takashima, Y.; Nakamura, Y. (2007 50th Midwest Symposium on Circuits and Systems, 2007)
Keywords: Circuit optimization; Clocks; Costs; Delay lines; Deskew; Fabrication; Fuses; Linear programming; Linear Programming (LP); Programmable Delay Element (PDE); Switches; Testing; Timing