Nakahara, H., Fujii, T., & Sato, S. (2017, September). A fully connected layer elimination for a binarizec convolutional neural network on an FPGA. International Conference on Field-programmable Logic and Applications, 1-4. https://doi.org/10.23919/FPL.2017.8056771
Chicago Style (17th ed.) CitationNakahara, Hiroki, Tomoya Fujii, and Shimpei Sato. "A Fully Connected Layer Elimination for a Binarizec Convolutional Neural Network on an FPGA." International Conference on Field-programmable Logic and Applications Sep. 2017: 1-4. https://doi.org/10.23919/FPL.2017.8056771.
MLA (9th ed.) CitationNakahara, Hiroki, et al. "A Fully Connected Layer Elimination for a Binarizec Convolutional Neural Network on an FPGA." International Conference on Field-programmable Logic and Applications, Sep. 2017, pp. 1-4, https://doi.org/10.23919/FPL.2017.8056771.