APA (7th ed.) Citation

Herrmann, V., Knapheide, J., Steinert, F., & Stabernack, B. (2022, August). A YOLO v3-tiny FPGA Architecture using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection. Proceedings (Euromicro Conference on Digital Systems Design), 84-92. https://doi.org/10.1109/DSD57027.2022.00021

Chicago Style (17th ed.) Citation

Herrmann, Viktor, Justin Knapheide, Fritjof Steinert, and Benno Stabernack. "A YOLO V3-tiny FPGA Architecture Using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection." Proceedings (Euromicro Conference on Digital Systems Design) Aug. 2022: 84-92. https://doi.org/10.1109/DSD57027.2022.00021.

MLA (9th ed.) Citation

Herrmann, Viktor, et al. "A YOLO V3-tiny FPGA Architecture Using a Reconfigurable Hardware Accelerator for Real-time Region of Interest Detection." Proceedings (Euromicro Conference on Digital Systems Design), Aug. 2022, pp. 84-92, https://doi.org/10.1109/DSD57027.2022.00021.