Implementation of memory stacking on logic controller by using 3DIC 300mm backside TSV process integration

Technologies of backside via-last TSV (BTSV) 3DIC 300mm process integration are developed to be applied in industry cooperation and mass production business model view. In this work, a successful BTSV process integration is disclosed and applied on 65nm logic controller/45nm DRAM stacking structure....

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Bibliographic Details
Published in2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) pp. 1 - 2
Main Authors Chen, Shang-Chun, Tzeng, Pei-Jer, Hsm, Yu-Chen, Wang, Chung-Chih, Chang, Po-Chih, Chen, Jui-Chm, Chang, Yiu-Hsiang, Chen, Tsuen-Sung, Hsu, Tzu-Chien, Chang, Hsiang-Hung, Zhan, Chau-Jie, Lee, Chia-Hsin, Chou, Yung-Fa, Kwai, Ding-Ming, Ku, Tzu-Kun, Wang, Pei-Hua, Lo, Wei-Chung
Format Conference Proceeding
LanguageEnglish
Published IEEE 01.04.2016
Subjects
Bonding
DRAM chips
Etching
Process control
Stacking
Substrates
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DOI10.1109/VLSI-TSA.2016.7480522

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Summary:Technologies of backside via-last TSV (BTSV) 3DIC 300mm process integration are developed to be applied in industry cooperation and mass production business model view. In this work, a successful BTSV process integration is disclosed and applied on 65nm logic controller/45nm DRAM stacking structure. Key enabling process technologies in BTSV formation and thin wafer handling are discussed. The electrical measurement data and functional logic circuit test show the practicability of BTSV integration.
DOI:10.1109/VLSI-TSA.2016.7480522