Parallelizing Non-Neural ML Algorithm for Edge-based Face Recognition on Parallel Ultra-Low Power (PULP) Cluster - Nagar, Mitul Sudhirkumar; Kumar, Rahul; Engineer, Pinalkumar (Mediterranean Conference on Embedded Computing (New Jersey. Online), 2023)
The multi-core parallel ultra-low power (PULP) cluster architecture allows the IoT edge node to shift toward near-sensor computing. In this paper, non-neural Eigenfaces-based face recognition (FR) is examined on an octa-core PULP cluster. It is possible to achieve high accuracy in the Eigenfaces-based algorithm without using a large data model. It is observed that the Eigenfaces-based face recognition algorithm achieved 93% accuracy on the PULP platform with a 4.55× lesser model size compared to the state-of-the-art SqueezeNet1.1-based FR algorithm on GAP8 platform. Parallelization of Eigenfaces-based face recognition is done to achieve maximum speed-up on multi-core, reducing recognition time. Furthermore, DMA-based communication between the fabric controller and multi-core cluster reduces the recognition time by 50× at the cost of a little degradation in speed-up on the multi-core. By adopting this technique, 165 faces per second are recognized with 93% accuracy on octa-core PULP cluster, which is 7.85× faster than a single core RISC-V with DMA. Compared to the ARM Cortex-M7 architecture, the multi-core PULP cluster reduces recognition time by 89.89%. These results make the multi-core PULP cluster an efficient choice for Eigenfaces-based face recognition on the edge.