Interface engineering for highly-reliable 65 nm-node Cu/ULK (k=2.6) interconnect integration - Ishii, A.; Matsumoto, S.; Hattori, T.; Suzuki, S.; Isono, S.; Iwasaki, A.; Tomita, K.; Hashimoto, K.; Tawa, S.; Furusawa, T.; Kodama, D.; Ogawa, S.; et al. (Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005, 2005)
Keywords: Degradation; Dielectrics; Geometry; Large scale integration; Manufacturing industries; Manufacturing processes; Reliability engineering; Semiconductor device manufacture; Testing; Ultra large scale integration