An accurate power model for GPU processors

• Published in: 2012 8th International Conference on Computing and Convergence Technology pp. 1141 - 1146
• Main Authors: Qiyao Xie, Tian Huang, Zhihai Zou, Liang Xia, Yongxin Zhu, Jiang Jiang
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01.12.2012
• Subjects: Bandwidth; Benchmark testing; Codes; Computational modeling; Computer architecture; Energy consumption; GPU architecture; Graphics processing units; native instructions; Power demand; power model; Program processors; Semiconductor process modeling
• ISBN: 1467308943; 9781467308946

Albeit general purpose graphics processing unit (GPU) processor has gained strong momentums in high performance computing domain recently, power consumption stays as the critical constraint in GPU architectures. Among many efforts dedicated to power reduction, most existing power analytical models can achieve sufficient estimate accuracy for a new GPU architecture only after its layout or floor plan is finalized, when it is usually too late for software designers working on the new GPU architecture. This paper presents an accurate power model based on GPU native instructions to analyze and estimate the power consumption at an architecture level. Taking the latest FERMI GPU architecture as an illustrative example to apply our methods, our model is comprised of two parts, i.e. the computing section and the memory section. With an integrated view of the GPU architecture, our model is able to estimate the power consumption for the GPU architecture under a series of workloads with deviations less than 15%. To the best of our knowledge, our model should outperform all existing analytical GPU power models in terms of accuracy.