Chapter 13 - Hardware Design and Realization for Iteratively Decodable Codes - Boutillon, Emmanuel; Masera, Guido (Channel Coding, 2014)
Keywords: Analog circuits; ASIC; Belief propagation; Channel decoder; CMOS; Electronics; Engineering Sciences; Factor graphs; Flexible; FPGA; High throughput; Iterative decoding; LDPC decoder; Low power; Multi-standard; Signal and Image processing; Turbo decoder; VLSI decoder architectures; LDPC decoder; FPGA; Turbo decoder; Analog circuits; Low power; Iterative decoding; High throughput; CMOS; ASIC; Flexible; Channel decoder; Factor graphs; VLSI decoder architectures; Belief propagation; Multi-standard