Hu, P. (2025). Virtual Simulation of Integrated Circuits Combining AP with DE Algorithm. Electronics ETF, 29(2), 43-52. https://doi.org/10.53314/ELS2529043H
Chicago Style (17th ed.) CitationHu, Peipei. "Virtual Simulation of Integrated Circuits Combining AP with DE Algorithm." Electronics ETF 29, no. 2 (2025): 43-52. https://doi.org/10.53314/ELS2529043H.
MLA (9th ed.) CitationHu, Peipei. "Virtual Simulation of Integrated Circuits Combining AP with DE Algorithm." Electronics ETF, vol. 29, no. 2, 2025, pp. 43-52, https://doi.org/10.53314/ELS2529043H.
Warning: These citations may not always be 100% accurate.