面向密码逻辑阵列的可编程控制网络设计与实现
为解决粗粒度密码逻辑阵列控制开销大、控制效率低的问题，在研究主流阵列处理架构下三层控制模型的基础上，提出了一种阵列的四层控制模型，并设计了对应的可编程控制网络。在规模为4x4的可编程控制网络上实现了对AES、A5—1等对称算法的控制流映射。在65nm CMOS工艺下，DC综合结果显示总面积为13712μm^2，折合等效与非门数0．95万，占阵列面积0．37％。映射AES和A5—1控制流最高频率分别为1389MHz和1190MHz，达到面积小、速度快的应用需求。将四层控制模型与三层控制模型进行六个不同性能对比，前者整体性能远超后者，且能满足任意网络互连结构阵列的高效控制需求。...
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| Published in | 电子技术应用 Vol. 43; no. 10; pp. 39 - 43 |
|---|---|
| Main Author | |
| Format | Journal Article |
| Language | Chinese |
| Published |
解放军信息工程大学,河南郑州,450001%解放军信息工程大学,河南郑州450001
2017
复旦大学 专用集成电路与系统国家重点实验室,上海201203 |
| Subjects | |
| Online Access | Get full text |
| ISSN | 0258-7998 |
| DOI | 10.16157/j.issn.0258-7998.171048 |
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| Abstract | 为解决粗粒度密码逻辑阵列控制开销大、控制效率低的问题，在研究主流阵列处理架构下三层控制模型的基础上，提出了一种阵列的四层控制模型，并设计了对应的可编程控制网络。在规模为4x4的可编程控制网络上实现了对AES、A5—1等对称算法的控制流映射。在65nm CMOS工艺下，DC综合结果显示总面积为13712μm^2，折合等效与非门数0．95万，占阵列面积0．37％。映射AES和A5—1控制流最高频率分别为1389MHz和1190MHz，达到面积小、速度快的应用需求。将四层控制模型与三层控制模型进行六个不同性能对比，前者整体性能远超后者，且能满足任意网络互连结构阵列的高效控制需求。 |
|---|---|
| AbstractList | TP332.3; 为解决粗粒度密码逻辑阵列控制开销大、控制效率低的问题,在研究主流阵列处理架构下三层控制模型的基础上,提出了一种阵列的四层控制模型,并设计了对应的可编程控制网络.在规模为4×4的可编程控制网络上实现了对AES、A5-1等对称算法的控制流映射.在65 nm CMOS工艺下,DC综合结果显示总面积为13 712 μm2,折合等效与非门数0.95万,占阵列面积0.37％.映射AES和A5-1控制流最高频率分别为1 389MHz和1 190MHz,达到面积小、速度快的应用需求.将四层控制模型与三层控制模型进行六个不同性能对比,前者整体性能远超后者,且能满足任意网络互连结构阵列的高效控制需求. 为解决粗粒度密码逻辑阵列控制开销大、控制效率低的问题，在研究主流阵列处理架构下三层控制模型的基础上，提出了一种阵列的四层控制模型，并设计了对应的可编程控制网络。在规模为4x4的可编程控制网络上实现了对AES、A5—1等对称算法的控制流映射。在65nm CMOS工艺下，DC综合结果显示总面积为13712μm^2，折合等效与非门数0．95万，占阵列面积0．37％。映射AES和A5—1控制流最高频率分别为1389MHz和1190MHz，达到面积小、速度快的应用需求。将四层控制模型与三层控制模型进行六个不同性能对比，前者整体性能远超后者，且能满足任意网络互连结构阵列的高效控制需求。 |
| Abstract_FL | In order to solve the problem that the coarse-grained cryptographic logic array control overhead is large and the control efficiency is low,this paper propose an array of four layer control model based on the study of the three layer control model of some main array processing architectures,and achieve efficient control of the AES,A5-1 and other symmetric algorithms on the scale of 4×4 programmable control network.The synthesis result of DC shows that the total area is 13 712 μm2 under the 65 nm CMOS process,which is equivalent to the number of 0.95 million NAND gates,accounting for 0.37％ of the array area.The highest frequency of AES and A5-1 control flow reaches 1 389 MHz and 1 190 MHz,respectively,which can meet the application requirements of small area and fast speed.Comparing the four layer control model and the three layer control model in six performances,the overall performance of the former is much better than the latter,and it can meet the requirements of efficient control of any network interconnection structure array. |
| Author | 刘露 徐金甫 李伟 杨宇航 |
| AuthorAffiliation | 解放军信息工程大学,河南郑州450001 复旦大学专用集成电路与系统国家重点实验室,上海201203 |
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| Author_FL | Yang Yuhang Xu Jinfu Liu Lu Li Wei |
| Author_FL_xml | – sequence: 1 fullname: Liu Lu – sequence: 2 fullname: Xu Jinfu – sequence: 3 fullname: Li Wei – sequence: 4 fullname: Yang Yuhang |
| Author_xml | – sequence: 1 fullname: 刘露 徐金甫 李伟 杨宇航 |
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| ClassificationCodes | TP332.3 |
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| Copyright | Copyright © Wanfang Data Co. Ltd. All Rights Reserved. |
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| DocumentTitleAlternate | Design and implementation of a programmable control network for cryptographic logic array |
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| Keywords | four layer control model coarse-grained cryptographic logic array 高效控制 可编程控制网络 粗粒度密码逻辑阵列 efficient control 四层控制模型 programmable control network |
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| Notes | In order to solve the problem that the coarse-grained cryptographic logic array control overhead is large and the control efficiency is low, this paper propose an array of four layer control model based on the study of the three layer control model of some main array processing architectures, and achieve efficient control of the AES, AS-1 and other symmetric algorithms on the scale of 4x4 programmable control network. The synthesis result of DC shows that the total area is 13 712 μm^2 under the 65 nm CMOS process, wbich is equivalent to the number of 0.95 million NAND gates, accounting for 0.37% of the array area. The highest frequency of AES and AS-1 control flow reaches 1 389 MHz and 1 190 MHz, respectively, which can meet the application requirements of small area and fast speed. Comparing the four layer control model and the three layer control model in six perfor-mances, the overall performance of the former is much better than the latter, and it can meet the requirements of efficient control of any netw |
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| Publisher | 解放军信息工程大学,河南郑州,450001%解放军信息工程大学,河南郑州450001 复旦大学 专用集成电路与系统国家重点实验室,上海201203 |
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| Snippet | 为解决粗粒度密码逻辑阵列控制开销大、控制效率低的问题，在研究主流阵列处理架构下三层控制模型的基础上，提出了一种阵列的四层控制模型，并设计了对应的可编程控制网络。... TP332.3; 为解决粗粒度密码逻辑阵列控制开销大、控制效率低的问题,在研究主流阵列处理架构下三层控制模型的基础上,提出了一种阵列的四层控制模型,并设计了对应的可编程控制... |
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| SubjectTerms | 可编程控制网络 四层控制模型 粗粒度密码逻辑阵列 高效控制 |
| Title | 面向密码逻辑阵列的可编程控制网络设计与实现 |
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