基于Butterfly网络的移数和p序置换统一架构研究与实现

为有效解决目前移数置换和p序置换硬件实现方式并行性和灵活性差、功能扩展性不强的问题，研究了Butterfly网络的特点，设计并实现了基于Butterfly网络的移数和p序置换的统一架构，分析并提取出支持该架构的路由算法。与传统对数移位器和桶形移位器相比，本架构并行性更好，灵活性更高，功能扩展性更强，同时支持短字置换和多路并行操作。与I～BFLY移位器相比，架构面积节省了30．0％且速度提升了17．6％。...

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Bibliographic Details
Published in电子技术应用 Vol. 40; no. 7; pp. 65 - 68
Main Author 郑诚玮 陈韬 戴紫彬 李伟
Format Journal Article
LanguageChinese
Published 解放军信息工程大学,河南郑州,450001 2014
Subjects
Butterfly网络
p序置换
多路并行
移数置换
路由算法
Butterfly网络
shift permutation
routing algorithm
p-sequence permutation
移数置换
p序置换
Butterfly network
多路并行
multiple parallelization
路由算法
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ISSN0258-7998

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Summary:为有效解决目前移数置换和p序置换硬件实现方式并行性和灵活性差、功能扩展性不强的问题，研究了Butterfly网络的特点，设计并实现了基于Butterfly网络的移数和p序置换的统一架构，分析并提取出支持该架构的路由算法。与传统对数移位器和桶形移位器相比，本架构并行性更好，灵活性更高，功能扩展性更强，同时支持短字置换和多路并行操作。与I～BFLY移位器相比，架构面积节省了30．0％且速度提升了17．6％。
Bibliography:Butterfly network ; routing algorithm ; shift permutation ; p-sequence permutation ; multiple parallelization
In order to solve the problem of poor flexibility, faulty parallelization and bad expansibility in the current designs, this paper researches the characteristics of Butterfly network. Based on it, the united architecture of shift and p-sequence permutation are designed and implemented and a routing algorithm is analyzed and extracted for it. Compared with traditional logarithmic shifters and barrel shifters, the architecture has better parallelization, higher flexibility and stronger expansibility, and supports short word substitution and multiple parallelization. Compared with the I-BFLY shifter, its area is reduced by 30% and speed is increased by 17.7%.
Zheng Chengwei, Chen Tao, Dai Zibin, Li Wei （PLA Information Engineering University,Zhengzhou 450001, China）
11-2305/TN
ISSN:0258-7998