Orbital Systolic Algorithms and Array Processors for Solution of the Algebraic Path Problem

The algebraic path problem (APP) is a general framework which unifies several solution procedures for a number of well-known matrix and graph problems. In this paper, we present a new 3-dimensional (3-D) orbital algebraic path algorithm and corresponding 2-D toroidal array processors which solve the...

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Published inIEICE Transactions on Information and Systems Vol. E93.D; no. 3; pp. 534 - 541
Main Authors MIYAZAKI, Toshiaki, KURODA, Kenichi, SEDUKHIN, Stanislav G.
Format Journal Article
LanguageEnglish
Published Oxford The Institute of Electronics, Information and Communication Engineers 2010
Oxford University Press
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Online AccessGet full text
ISSN0916-8532
1745-1361
1745-1361
DOI10.1587/transinf.E93.D.534

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Abstract The algebraic path problem (APP) is a general framework which unifies several solution procedures for a number of well-known matrix and graph problems. In this paper, we present a new 3-dimensional (3-D) orbital algebraic path algorithm and corresponding 2-D toroidal array processors which solve the n × n APP in the theoretically minimal number of 3n time-steps. The coordinated time-space scheduling of the computing and data movement in this 3-D algorithm is based on the modular function which preserves the main technological advantages of systolic processing: simplicity, regularity, locality of communications, pipelining, etc. Our design of the 2-D systolic array processors is based on a classical 3-D→2-D space transformation. We have also shown how a data manipulation (copying and alignment) can be effectively implemented in these array processors in a massively-parallel fashion by using a matrix-matrix multiply-add operation.
AbstractList The algebraic path problem (APP) is a general framework which unifies several solution procedures for a number of well-known matrix and graph problems. In this paper, we present a new 3-dimensional (3-D) orbital algebraic path algorithm and corresponding 2-D toroidal array processors which solve the n × n APP in the theoretically minimal number of 3n time-steps. The coordinated time-space scheduling of the computing and data movement in this 3-D algorithm is based on the modular function which preserves the main technological advantages of systolic processing: simplicity, regularity, locality of communications, pipelining, etc. Our design of the 2-D systolic array processors is based on a classical 3-D→2-D space transformation. We have also shown how a data manipulation (copying and alignment) can be effectively implemented in these array processors in a massively-parallel fashion by using a matrix-matrix multiply-add operation.
Author MIYAZAKI, Toshiaki
SEDUKHIN, Stanislav G.
KURODA, Kenichi
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10.1201/9781482276046-23
10.1109/ISSCC.2007.373606
10.1007/BF02253318
10.1016/0304-3975(77)90056-1
10.1016/0743-7315(92)90038-O
10.1007/3-540-16811-7_165
10.1109/71.995819
10.1142/S0129626491000173
10.1109/N-SSC.2008.4785820
10.1016/0020-0190(88)90185-8
10.1007/978-3-540-77704-5_19
10.1109/ISCA.2008.15
10.1109/12.293256
10.1007/978-3-7091-9076-0_9
10.1109/TPDS.2004.44
10.1016/0167-9260(93)90012-2
10.1109/71.139200
10.1109/TC.1987.1676945
10.1109/ASPDAC.2009.4796515
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Issue 3
Keywords orbital systolic algorithms
Array processor
data manipulation
Step method
Scheduling
Systolic network
Algorithm
Implementation
Pipeline processing
Three dimensional model
array processors
Posterior probability
algebraic path problem
Integrated circuit
Massive parallelism
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References_xml – reference: [12] S.Y. Kung, S.C. Lo, and P.S. Lewis, “Optimal systolic design for the transitive closure and the shortest path problems,” IEEE Trans. Comput., vol.36, no.5, pp.603-614, 1987.
– reference: [17] D. Lavenier, P. Quinton, and S. Rajopadhye, “Advanced systolic design,” in Digital signal processing for multimedia systems, ed. K.K. Parhi and T. Nishitani, pp.657-692, CRC Press, 1999.
– reference: [10] T. Risset and Y. Robert, “Synthesis of processor arrays for the algebraic path problem: Unified old results and deriving new architectures,” Parallel Processing Letters, no.11, pp.19-28, 1991.
– reference: [3] Y. Robert and D. Trystram, “Parallel implementation of the algebraic path problem,” Proc. Conference on Algorithms and Hardware for Parallel Processing on CONPAR 86, pp.149-156, New York, NY, USA, Springer-Verlag New York, 1986.
– reference: [26] T.H. Cormen, C.E. Leiserson, R.L. Rivest, and C. Stein, Introduction to Algorithms, Second ed., The MIT Press and McGraw-Hill Book Company, 2001.
– reference: [8] D. Cachera, S. Rajopadhye, T. Risset, and C. Tadonki, “Parallelization of the algebraic path problem on linear SIMD/SPMD arrays,” Technical Report 1346, Irisa, 2001.
– reference: [29] J.D. Ullmann, Computational aspects of VLSI, Computer Science Press, New York, 1984.
– reference: [22] E.H. Heijne, “Gigasensors for an attoscope: Catching quanta in CMOS,” IEEE Solid-State Circuits Newsletter, vol.13, no.4, pp.28-34, Oct. 2008.
– reference: [27] G.H. Golub and C.F.V. Loan, Matrix Computations, Third ed., The John Hopkins University Press, Baltimore, Maryland, 1996.
– reference: [31] L. Cannon, A cellular computer to implement the Kalman filter algorithm, Ph.D. Thesis, Montana State Univ., 1969.
– reference: [5] G. Rote, “Path problems in graphs,” Computing Supplementum, vol.7, pp.155-189, 1990.
– reference: [24] S.M. Chai and D.S. Wills, “Systolic opportunities for multidimensional data streams,” IEEE Trans. Parallel Distrib. Syst., vol.13, no.4, pp.388-398, 2002.
– reference: [4] B.M. Maggs and S.A. Poltkin, “Minimum-cost spanning tree as a path-finding problem,” Inf. Process. Lett., vol.26, no.6, pp.291-293, 1988.
– reference: [13] P.Y. Chang and J.C. Tsay, “A family of efficient regular arrays for algebraic path problem,” IEEE Trans. Comput., vol.43, no.7, pp.769-777, July 1994.
– reference: [2] G. Rote, “A systolic array algorithm for the algebraic path problem,” Computing, vol.34, pp.191-219, 1985.
– reference: [16] C. Scheiman and P. Cappello, “A processor-time-minimal systolic array for transitive closure,” IEEE Trans. Parallel Distrib. Syst., vol.3, no.3, pp.257-269, 1992.
– reference: [20] G. Loh, “3D-stacked memory architectures for multi-core processors,” Computer Architecture, 2008. ISCA '08. 35th International Symposium, pp.453-464, June 2008.
– reference: [15] A. Benaini and Y. Robert, “Space-time minimal systolic arrays for Gaussian elimination and the algebraic path problem,” Parallel Comput., vol.15, no.1-3, pp.211-225, 1990.
– reference: [7] E. Fink, “A survey of sequential and systolic algorithms for the algebraic path problem,” Technical Report CS-92-37, Department of Computer Science, University of Waterloo, 1992.
– reference: [6] S.G. Sedukhin, “Design and analysis of systolic algorithms for the algebraic path problem,” Computers and Artificial Intelligence, vol.11, pp.269-292, 1992.
– reference: [28] M. Penner, J.S. Park, and V.K. Prasanna, “Optimizing graph algorithms for improved cache performance,” IEEE Trans. Parallel Distrib. Syst., vol.15, no.9, pp.769-782, 2004.
– reference: [11] S. Rajopadhye, “An improved systolic algorithm for the algebraic path problem,” Integr. VLSI J., vol.14, no.3, pp.279-296, 1993.
– reference: [18] M. Koyanagi, T. Fukushima, and T. Tanaka, “Three-dimensional integration technology and integrated systems,” Design Automation Conference, 2009. ASP-DAC 2009. Asia and South Pacific, pp.409-415, Jan. 2009.
– reference: [21] S. Vangal, J. Howard, G. Ruhl, S. Dighe, H. Wilson, J. Tschanz, D. Finan, P. Iyer, A. Singh, T. Jacob, S. Jain, S. Venkataraman, Y. Hoskote, and N. Borkar, “An 80-tile 1.28TFLOPS network-on-chip in 65nm CMOS,” Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. pp.98-589, IEEE International, Feb. 2007.
– reference: [30] A.S. Zekri and S.G. Sedukhin, “Computationally efficient parallel matrix-matrix multiplication on the torus,” ISHPC-6th Int. Symp. on High Performance Computing, pp.219-226, Springer-Verlag, Sept. 2005.
– reference: [23] Wikipedia, “FLOPS: Cost of computing,” Website, http://en.wikipedia.org/wiki/GFlop, 2009.
– reference: [1] D.J. Lehmann, “Algebraic structures for transitive closure,” Theor. Comput. Sci., vol.4, no.1, pp.59-76, 1977.
– reference: [19] Intel, “Tera-scale Computing Research Program,” Website, http://techresearch.intel.com/articles/Tera-Scale/1421.htm, 2009.
– reference: [14] T. Takaoka and K. Umehara, “An efficient vlsi algorithms for the all pairs shortest path problem,” J. Parallel Distrib. Comput., vol.16, no.3, pp.265-270, 1992.
– reference: [9] C.T. Djamégni, P. Quinton, S. Rajopadhye, and T. Risset, “Derivation of systolic algorithms for the algebraic path problem by recurrence transformations,” Parallel Comput., vol.26, no.11, pp.1429-1445, 2000.
– reference: [25] L.J. Guibas, H.T. Kung, and C.D. Thompson, “Direct VLSI implementation of combinatorial algorithms,” Proc. First Caltech Conference on VLSI, pp.509-525, Pasadena, CA, California Institute of Technology, Jan. 1979.
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Snippet The algebraic path problem (APP) is a general framework which unifies several solution procedures for a number of well-known matrix and graph problems. In this...
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SubjectTerms algebraic path problem
Applied sciences
array processors
data manipulation
Design. Technologies. Operation analysis. Testing
Electronics
Exact sciences and technology
Integrated circuits
Integrated circuits by function (including memories and processors)
orbital systolic algorithms
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Title Orbital Systolic Algorithms and Array Processors for Solution of the Algebraic Path Problem
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