Aghaee, N., Peng, Z., & Eles, P. (2015). A Test-Ordering Based Temperature-Cycling Acceleration Technique for 3D Stacked ICs. Journal of electronic testing, 31(5-6), 503-523. https://doi.org/10.1007/s10836-015-5541-5
Chicago Style (17th ed.) CitationAghaee, Nima, Zebo Peng, and Petru Eles. "A Test-Ordering Based Temperature-Cycling Acceleration Technique for 3D Stacked ICs." Journal of Electronic Testing 31, no. 5-6 (2015): 503-523. https://doi.org/10.1007/s10836-015-5541-5.
MLA (9th ed.) CitationAghaee, Nima, et al. "A Test-Ordering Based Temperature-Cycling Acceleration Technique for 3D Stacked ICs." Journal of Electronic Testing, vol. 31, no. 5-6, 2015, pp. 503-523, https://doi.org/10.1007/s10836-015-5541-5.
Warning: These citations may not always be 100% accurate.