Code generator for implementing dual tree complex wavelet transform on reconfigurable architectures for mobile applications

• Published in: Healthcare technology letters Vol. 3; no. 3; pp. 184 - 188
• Main Authors: Canbay, Ferhat, Levent, Vecdi Emre, Serbes, Gorkem, Ugurdag, H. Fatih, Goren, Sezer, Aydin, Nizamettin
• Format: Journal Article
• Language: English
• Published: England The Institution of Engineering and Technology 01.09.2016
• Subjects: C language; code generator program; DTCWT algorithm; dual tree complex wavelet transform; embedded‐system approach; field programmable gate array; field programmable gate arrays; generator DSP design tool; hardware description language; hardware description languages; high‐performance computing; medical signal processing; mobile applications; mobile computing; multichannel real‐time application; personal computer; PIC microcontroller; Special Issue: mHealth: Emerging Mobile Health Systems and Services; Verilog; wavelet transforms; Xilinx; wavelet transforms; field programmable gate arrays; multichannel real-time application; hardware description languages; C language; personal computer; dual tree complex wavelet transform; medical signal processing; PIC microcontroller; mobile computing; field programmable gate array; hardware description language; code generator program; Verilog; mobile applications; generator DSP design tool; Xilinx; embedded-system approach; DTCWT algorithm; high-performance computing
• ISSN: 2053-3713; 2053-3713
• DOI: 10.1049/htl.2016.0034

The authors aimed to develop an application for producing different architectures to implement dual tree complex wavelet transform (DTCWT) having near shift-invariance property. To obtain a low-cost and portable solution for implementing the DTCWT in multi-channel real-time applications, various embedded-system approaches are realised. For comparison, the DTCWT was implemented in C language on a personal computer and on a PIC microcontroller. However, in the former approach portability and in the latter desired speed performance properties cannot be achieved. Hence, implementation of the DTCWT on a reconfigurable platform such as field programmable gate array, which provides portable, low-cost, low-power, and high-performance computing, is considered as the most feasible solution. At first, they used the system generator DSP design tool of Xilinx for algorithm design. However, the design implemented by using such tools is not optimised in terms of area and power. To overcome all these drawbacks mentioned above, they implemented the DTCWT algorithm by using Verilog Hardware Description Language, which has its own difficulties. To overcome these difficulties, simplify the usage of proposed algorithms and the adaptation procedures, a code generator program that can produce different architectures is proposed.