Indium bump array fabrication on small CMOS circuit for flip-chip bonding
We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist...
Saved in:
| Published in | Journal of semiconductors Vol. 32; no. 11; pp. 148 - 151 |
|---|---|
| Main Author | |
| Format | Journal Article |
| Language | English |
| Published |
IOP Publishing
01.11.2011
|
| Subjects | |
| Online Access | Get full text |
| ISSN | 1674-4926 |
| DOI | 10.1088/1674-4926/32/11/115014 |
Cover
| Abstract | We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500 μm, which ensures the integrity of the indium bump array. 64 - 64 indium arrays with 20 μm-high, 30 μm-diameter bumps are successfully formed on a 5 - 6.5 mm^2 CMOS chip. |
|---|---|
| AbstractList | NRC publication: Yes We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500 μm, which ensures the integrity of the indium bump array. 64 - 64 indium arrays with 20 μm-high, 30 μm-diameter bumps are successfully formed on a 5 - 6.5 mm^2 CMOS chip. We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/AlGaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 mu m-wide photoresist edge bead around the circuit chip can be reduced to less than 500 mu m, which ensures the integrity of the indium bump array. 64 x 64 indium arrays with 20 mu m-high, 30 mu m-diameter bumps are successfully formed on a 5 x 6.5 mm super(2) CMOS chip. |
| Author | 黄寓洋 张宇翔 殷志珍 崔国新 刘惠春 边历峰 杨辉 张耀辉 |
| AuthorAffiliation | Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215125, China Institute for Microstructural Sciences, National Research Council, Ottawa K1A0R6, Canada |
| Author_xml | – sequence: 1 fullname: 黄寓洋 张宇翔 殷志珍 崔国新 刘惠春 边历峰 杨辉 张耀辉 |
| BookMark | eNqNkU1v3CAQhjmkUtI0f6Eit17c5cs2SLlUqzZZKVEOSc9oYCFBssEB-5B_XzaO9lBFaqURo4H3eWGGz-gkpugQ-krJd0qk3NCuF41QrNtwtqG0RkuoOEFnx4NTdFFKMIQoKbkg5AztdnEflhGbZZww5Ayv2IPJwcIcUsQ1ygjDgLd39w_YhmyXMGOfMvZDmBr7HCZsUrWIT1_QJw9DcRfv-Rz9_vXzcXvT3N5f77Y_bhsrWjU30Dq1N5wqZZgxgljrOel7TiQF5bkUhjgGQhBHGUhlbW8kUcz4rjO1avk5-rb6Tjm9LK7MegzFumGA6NJSNBVc9a0SrajSq1VqcyolO69tmN8amzOEQVOiD4PTh_now3w0Z5pSvQ6u4t1f-JTDCPn13-DNCsZsLUTYw5FMEOojyhx0OCRdFdq-LbDuxwlqxSjrqWBdtaKrVUjT_1_ffMB8qNXT3lf95Xufzyk-vdS_PFJcScaEkPwPGQC2uw |
| CitedBy_id | crossref_primary_10_1088_1361_6463_abcfe4 |
| Cites_doi | 10.1016/j.infrared.2004.02.002 10.1109/68.376802 10.1109/68.868012 10.1016/j.infrared.2003.08.002 10.1088/1674-4926/31/3/034007 |
| ContentType | Journal Article |
| DBID | 2RA 92L CQIGP W92 ~WA -LJ GXV AAYXX CITATION 7SP 7U5 8FD L7M |
| DOI | 10.1088/1674-4926/32/11/115014 |
| DatabaseName | 维普期刊资源整合服务平台 中文科技期刊数据库-CALIS站点 维普中文期刊数据库 中文科技期刊数据库-工程技术 中文科技期刊数据库- 镜像站点 National Research Council Canada Archive CISTI Source CrossRef Electronics & Communications Abstracts Solid State and Superconductivity Abstracts Technology Research Database Advanced Technologies Database with Aerospace |
| DatabaseTitle | CrossRef Solid State and Superconductivity Abstracts Technology Research Database Advanced Technologies Database with Aerospace Electronics & Communications Abstracts |
| DatabaseTitleList | Solid State and Superconductivity Abstracts |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering Physics Sciences |
| DocumentTitleAlternate | Indium bump array fabrication on small CMOS circuit for flip-chip bonding |
| EndPage | 151 |
| ExternalDocumentID | 10_1088_1674_4926_32_11_115014 oai_cisti_icist_nrc_cnrc_ca_cistinparc_21271426 39822448 |
| GroupedDBID | 02O 042 1WK 2B. 2C0 2RA 4.4 5B3 5VR 5VS 7.M 92H 92I 92L 92R 93N AAGCD AAJIO AALHV AATNI ABHWH ACAFW ACGFO ACGFS ACHIP AEFHF AFUIB AFYNE AHSEE AKPSB ALMA_UNASSIGNED_HOLDINGS ASPBG AVWKF AZFZN BBWZM CCEZO CEBXE CHBEP CJUJL CQIGP CRLBU CUBFJ CW9 EBS EDWGO EJD EQZZN FA0 IJHAN IOP IZVLO JCGBZ KNG KOT M45 N5L NS0 NT- NT. PJBAE Q02 RIN RNS ROL RPA RW3 SY9 TCJ TGT W28 W92 ~WA CDYEO UNR -LJ -SI -S~ 5XA 5XJ ACARI AEINN AERVB AGQPQ AOAED ARNYC CAJEI GXV Q-- TGMPQ U1G U5S AAYXX CITATION 7SP 7U5 8FD L7M |
| ID | FETCH-LOGICAL-c459t-a5e9db3199b2bb40ccf30773081a9f384b0e2a440e12a89cc7b8092bf66b9cc53 |
| IEDL.DBID | IOP |
| ISSN | 1674-4926 |
| IngestDate | Fri Sep 05 06:35:09 EDT 2025 Wed Oct 01 03:59:20 EDT 2025 Thu Apr 24 23:08:53 EDT 2025 Fri Sep 26 16:39:53 EDT 2025 Tue Nov 10 14:16:36 EST 2020 Mon May 13 12:53:33 EDT 2019 Wed Feb 14 10:47:50 EST 2024 |
| IsPeerReviewed | true |
| IsScholarly | true |
| Issue | 11 |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-c459t-a5e9db3199b2bb40ccf30773081a9f384b0e2a440e12a89cc7b8092bf66b9cc53 |
| Notes | We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500 μm, which ensures the integrity of the indium bump array. 64 - 64 indium arrays with 20 μm-high, 30 μm-diameter bumps are successfully formed on a 5 - 6.5 mm^2 CMOS chip. 11-5781/TN flip-chip bonding; indium bump; array; small-size Huang Yuyang, Zhang Yuxiang, Yin Zhizhen, Cui Guoxin, Liu H C, Bian Lifeng, Yang Hui, Zhang Yaohui 1Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, Suzhou 215125, China 2Institute for Microstructural Sciences, National Research Council, Ottawa K1A 0R6, Canada ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
| PQID | 1439759454 |
| PQPubID | 23500 |
| PageCount | 4 |
| ParticipantIDs | crossref_citationtrail_10_1088_1674_4926_32_11_115014 crossref_primary_10_1088_1674_4926_32_11_115014 nrccanada_primary_oai_cisti_icist_nrc_cnrc_ca_cistinparc_21271426 chongqing_primary_39822448 proquest_miscellaneous_1439759454 iop_primary_10_1088_1674_4926_32_11_115014 |
| ProviderPackageCode | CITATION AAYXX |
| PublicationCentury | 2000 |
| PublicationDate | 2011-11-01 |
| PublicationDateYYYYMMDD | 2011-11-01 |
| PublicationDate_xml | – month: 11 year: 2011 text: 2011-11-01 day: 01 |
| PublicationDecade | 2010 |
| PublicationTitle | Journal of semiconductors |
| PublicationTitleAlternate | Chinese Journal of Semiconductors |
| PublicationYear | 2011 |
| Publisher | IOP Publishing |
| Publisher_xml | – name: IOP Publishing |
| References | 2 3 4 Lau J (6) 2000 7 Kahng A B (8) 2004 Elenius P (1) 2000; 4 Huang Y Y (5) 2010; 31 |
| References_xml | – ident: 3 doi: 10.1016/j.infrared.2004.02.002 – ident: 4 doi: 10.1109/68.376802 – year: 2000 ident: 6 publication-title: Low cost flip chip technologies: for DCA, WLCSP, and PBGA assemblies – volume: 4 start-page: 81 issn: 1526-1344 year: 2000 ident: 1 publication-title: Chip Scale Rev. – ident: 2 doi: 10.1109/68.868012 – ident: 7 doi: 10.1016/j.infrared.2003.08.002 – start-page: 70 year: 2004 ident: 8 – volume: 31 start-page: 034007 year: 2010 ident: 5 publication-title: J. Semiconductors doi: 10.1088/1674-4926/31/3/034007 |
| SSID | ssib009883400 ssib051367712 ssib004869572 ssj0067441 ssib016971655 ssib022315920 ssib004377404 ssib017478542 |
| Score | 1.8382437 |
| Snippet | We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/A1GaAs multiple quantum well... NRC publication: Yes We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/AlGaAs multiple quantum well... |
| SourceID | proquest crossref nrccanada iop chongqing |
| SourceType | Aggregation Database Enrichment Source Index Database Publisher |
| StartPage | 148 |
| SubjectTerms | array Arrays Bonding Chip formation Chips Circuits CMOS CMOS chips CMOS circuits CMOS integrated circuits CMOS电路 Edge bead Flip chip Flip chip devices Flip-chip bonding GaAs/AlGaAs Indium indium bump Indium bumps Light modulators Photoresists Semiconductor quantum wells Semiconductors small-size Spatial light modulators Via hole 倒装芯片 光致抗蚀剂 制造 空间光调制器 芯片键合 铟凸点 阵列 |
| Title | Indium bump array fabrication on small CMOS circuit for flip-chip bonding |
| URI | http://lib.cqvip.com/qk/94689X/201111/39822448.html http://iopscience.iop.org/1674-4926/32/11/115014 https://nrc-publications.canada.ca/eng/view/object/?id=5e98f7a8-bd29-4039-b125-47020e6e8a9f https://www.proquest.com/docview/1439759454 |
| Volume | 32 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| journalDatabaseRights | – providerCode: PRVIOP databaseName: IOP Science Platform issn: 1674-4926 databaseCode: IOP dateStart: 20090101 customDbUrl: isFulltext: true dateEnd: 99991231 titleUrlDefault: https://iopscience.iop.org/ omitProxy: false ssIdentifier: ssj0067441 providerName: IOP Publishing |
| link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3da9UwFD_MgaAPTqdiN5UI4oPQe_uRNM3jGI5NmFN0sLeQpK0r3rVdb_uw_fU7ST9wbOCE0s-TtE1OTs5Jcn4H4CMvCoN6fOonnAc-DTX3tdChH2dFloqEGuXGIY-_JYen9OsZO9uAKQhiWTej5F_g6TCTn3DqW1i7ZRwtw3BpVRgXudq2Veuxd_J9Er1I6UJVzkkml2C08u7PxiIqnNfV70vsJ271TI_w9fiwao1bfKXuiGrX_xxswY_Ji2dYdvJn0Xd6Ya7vgjo--Neew7NRGSV7A_e8gI282oanf0EUbsNjt0TUrF_C0VGVlf0F0cgARLWtuiKF0u045kdwW1-o1YrsH5_8JKZsTV92BFViUqzKxjfnZUN07XxoXsHpwZdf-4f-GIjBN5SJzlcsF5nGxip0pDUNjClQNKBsSEMlijilOsgjRWmQh5FKhTFcp4GIdJEkGq9Y_Bo2q7rK3wDRYcaN0JQztNNYbhTjGapUivJcCZUFHuzMFSKbAXBDxhZkEO1ID9hUQ9KMEOY2ksZKuqn0NJW2RKUtURlHaNzIoUQ9WM7ppjz_leIzVtKDiT_dIr6XSDZZ4cHezFAzucX3Nlaey9IeJFJI43ZquF81KPKkReIPUZ3y4MPEiBIlgZ3eUVVe92s04lC3ZIIyuvM_X78LT9w4ufOvfAubXdvn71DR6vR717huAOodFzg |
| linkProvider | IOP Publishing |
| linkToPdf | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwpV1Zb9QwEB61RSB44ChFpFxGQjwgZXPZSfxYla66QA8JKvXNsp2ERmyTkN08wK9n7ByiHAKEFOWcsRwf4xl75jPAi6QoNOrxqRsnie_SQCWu4ipwo6zIUh5TLe085NFxfHhG35yz8w04mGJh6mYQ_TO87YGC-yIcHOJSz_jNuwbnzotCLwg8o9ME1GuyYhOusSiODIT-4uR0FMhIbjewnPjGQOHfpmVwFi7q6uNnHD2ujFebmCf8WLXaumTJnwS4HZXmd3rvkZUFMzTOKJ9m3VrN9NcfoB7_-4fvwu1BbyV7PdM92Mirbbj1HZrhNly33qR6dR8Wiyoru0uisK0Q2bbyCymkaofpQYLH6lIul2T_6OQ90WWru3JNUHsmxbJsXH1RNkTVNtxmB87mBx_2D91hzwZXU8bXrmQ5zxT2a65CpaivdYFSBMVIGkheRClVfh5KSv08CGXKtU5U6vNQFXGs8IlFD2Crqqv8IRAVZInmiiYMTTqWa8mSDLUvSZNccpn5DuxOtSSaHptDRAaPEE1OB9hYbUIPaOdm042lsKvuaSpMqQpTqiIK0Q4Sfak64E18Y5p_4niFFffXxC-vEP-SSGDNOrA3tbKJ3ECBayP6RWkuAimEtifZv68alI7CgPYHqHk58HxsnQKFhlkJklVedyu091ANZZwyuvsvuX8GN05fz8W7xfHbR3DTzq7bqMzHsLVuu_wJqmdr9dR2vm8jGCch |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Indium+bump+array+fabrication+on+small+CMOS+circuit+for+flip-chip+bonding&rft.jtitle=%E5%8D%8A%E5%AF%BC%E4%BD%93%E5%AD%A6%E6%8A%A5&rft.au=%E9%BB%84%E5%AF%93%E6%B4%8B+%E5%BC%A0%E5%AE%87%E7%BF%94+%E6%AE%B7%E5%BF%97%E7%8F%8D+%E5%B4%94%E5%9B%BD%E6%96%B0+%E5%88%98%E6%83%A0%E6%98%A5+%E8%BE%B9%E5%8E%86%E5%B3%B0+%E6%9D%A8%E8%BE%89+%E5%BC%A0%E8%80%80%E8%BE%89&rft.date=2011-11-01&rft.issn=1674-4926&rft.volume=32&rft.issue=11&rft.spage=148&rft.epage=151&rft_id=info:doi/10.1088%2F1674-4926%2F32%2F11%2F115014&rft.externalDocID=39822448 |
| thumbnail_s | http://utb.summon.serialssolutions.com/2.0.0/image/custom?url=http%3A%2F%2Fimage.cqvip.com%2Fvip1000%2Fqk%2F94689X%2F94689X.jpg |