Linear-programming-based techniques for synthesis of network-on-chip architectures - Srinivasan, K.; Chatha, K.S.; Konjevod, G. (IEEE transactions on very large scale integration (VLSI) systems, 2006)
Keywords: Applied sciences; Bandwidth; Clocks; Computer architecture; Design automation; Design. Technologies. Operation analysis. Testing; Digital signal processing; Electronics; Energy consumption; Exact sciences and technology; Formulations; Hardware; Input-output equipment; integrated circuit interconnection; Integrated circuit technology; Integrated circuits; Integrated circuits by function (including memories and processors); Linear programming; Links; multiprocessor interconnection; Network synthesis; Network-on-a-chip; Power consumption; Routers; Run time (computers); Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Studies; Synthesis; System-on-a-chip; Topology; Very large scale integration; Performance evaluation; Interconnection network; Design automation; Circuit design; multiprocessor interconnection; Integrated circuit interconnections; Network architecture; Linear programming; Mixed integer programming; Router; System on a chip; Optimization; integrated circuit interconnection; Aggregation; Multiprocessor; Integrated circuit layout; Power consumption; Integrated circuit; Heuristic method; Custom circuit; Computer aided design; Comparative study; Execution time