Mapping deep nested do-loop DSP algorithms to large scale FPGA array structures - Kittitornkun, S.; Yu Hen Hu (IEEE transactions on very large scale integration (VLSI) systems, 2003)
Keywords: Algorithms; Applied sciences; Circuit properties; Design automation; Design engineering; Design methodology; Design. Technologies. Operation analysis. Testing; Digital circuits; Digital signal processing; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Field programmable gate arrays; Graphs; Integrated circuits; Integrated circuits by function (including memories and processors); Large-scale systems; Linear arrays; Logic devices; Logic gates; Logic programming; Mapping; Methodology; Programmable logic arrays; Reconfigurable logic; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Studies; Very large scale integration; Performance evaluation; Array processor; Circuit design; field programmable gate arrays (FPGAs); Linear array; Logic gate; high-level synthesis; Mapping; Field programmable gate array; Systolic network; Algorithm; Implementation; Periodic structure; Look up table; Logic circuit; Integrated circuit; systolic array; Parallelism; Reconfigurable architectures; Large scale; Digital signal processor; parallel computing; Computer aided design; Dependence graph