Practical implementation of a digital signal processor controlled multilevel inverter with low total harmonic distortion for motor drive applications

► An enhanced analytical model of SPWM is developer in this paper. ► In addition to base band harmonics that are considered in regular SPWM, we eliminated the side band harmonics that are caused by carrier frequency by the developed modulation scheme. ► Simultaneous calculation method is proposed in...

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Published inJournal of power sources Vol. 196; no. 18; pp. 7585 - 7593
Main Authors Colak, Ilhami, Kabalci, Ersan
Format Journal Article
LanguageEnglish
Published Amsterdam Elsevier B.V 15.09.2011
Elsevier
Subjects
Applied sciences
Digital signal processing
Digital signal processors
Electric potential
Electrical engineering. Electrical power engineering
Electrical machines
Electrical power engineering
Exact sciences and technology
Harmonic distortion
Harmonics
Inverters
Microprocessors
Multilevel inverter
Operation. Load control. Reliability
Power electronics, power supplies
Power networks and lines
Pulse duration modulation
Regulation and control
Sinusoidal pulse width modulation
Theory. Simulation
Total harmonic distortion analysis
Voltage
Sinusoidal pulse width modulation
Total harmonic distortion analysis
Digital signal processors
Multilevel inverter
Motor drives
Power converter
Power system harmonics
Power system stability
Harmonic analysis
Power electronics
Implementation
Energy quality
Harmonic distortion
Pulse duration modulation
Digital signal processor
Service quality
Multilevel system
Online AccessGet full text
ISSN0378-7753
1873-2755
DOI10.1016/j.jpowsour.2011.04.044

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Abstract ► An enhanced analytical model of SPWM is developer in this paper. ► In addition to base band harmonics that are considered in regular SPWM, we eliminated the side band harmonics that are caused by carrier frequency by the developed modulation scheme. ► Simultaneous calculation method is proposed instead of look-up table in DSP application. ► We compared the obtained results with previous studies. ► Considering the side band harmonics caused by multiple carrier frequencies decreased the THD ratio. This paper presents a digital signal processor (DSP) based algorithm to generate three-level output voltage using H-Bridge multilevel inverter (MLI). The developed sinusoidal pulse width modulation (SPWM) scheme is employed to achieve lower harmonic contents in the output waveforms of inverter. Since SPWM scheme does not utilize vector positions, any pre-calculated switching states are not required. In addition to this advantage of conventional SPWM, modulators eliminate only base band harmonics due to regular control scheme. Therefore, neglecting the side band harmonics limits the efficiency of SPWM scheme. The harmonics located in the side bands of carrier frequency are also eliminated by the enhanced SPWM scheme proposed in this study. The validation of the modelled system is verified with the total harmonic distortion (THD) analyzes. The control algorithm is developed using TMS320F2812 DSP that is a 32-bit fixed-point processor operating at 150 MHz. The simulation and experimental results are compared to previous studies. The THD ratios of phase voltages and currents are measured loading the inverter with a three- phase 3 kW asynchronous motor. The lowest THD ratios of voltage and current are obtained at 1.9% and 0.4%, respectively.
AbstractList This paper presents a digital signal processor (DSP) based algorithm to generate three-level output voltage using H-Bridge multilevel inverter (MLI). The developed sinusoidal pulse width modulation (SPWM) scheme is employed to achieve lower harmonic contents in the output waveforms of inverter. Since SPWM scheme does not utilize vector positions, any pre-calculated switching states are not required. In addition to this advantage of conventional SPWM, modulators eliminate only base band harmonics due to regular control scheme. Therefore, neglecting the side band harmonics limits the efficiency of SPWM scheme. The harmonics located in the side bands of carrier frequency are also eliminated by the enhanced SPWM scheme proposed in this study. The validation of the modelled system is verified with the total harmonic distortion (THD) analyzes. The control algorithm is developed using TMS320F2812 DSP that is a 32-bit fixed-point processor operating at 150 MHz. The simulation and experimental results are compared to previous studies. The THD ratios of phase voltages and currents are measured loading the inverter with a three- phase 3 kW asynchronous motor. The lowest THD ratios of voltage and current are obtained at 1.9% and 0.4%, respectively.
► An enhanced analytical model of SPWM is developer in this paper. ► In addition to base band harmonics that are considered in regular SPWM, we eliminated the side band harmonics that are caused by carrier frequency by the developed modulation scheme. ► Simultaneous calculation method is proposed instead of look-up table in DSP application. ► We compared the obtained results with previous studies. ► Considering the side band harmonics caused by multiple carrier frequencies decreased the THD ratio. This paper presents a digital signal processor (DSP) based algorithm to generate three-level output voltage using H-Bridge multilevel inverter (MLI). The developed sinusoidal pulse width modulation (SPWM) scheme is employed to achieve lower harmonic contents in the output waveforms of inverter. Since SPWM scheme does not utilize vector positions, any pre-calculated switching states are not required. In addition to this advantage of conventional SPWM, modulators eliminate only base band harmonics due to regular control scheme. Therefore, neglecting the side band harmonics limits the efficiency of SPWM scheme. The harmonics located in the side bands of carrier frequency are also eliminated by the enhanced SPWM scheme proposed in this study. The validation of the modelled system is verified with the total harmonic distortion (THD) analyzes. The control algorithm is developed using TMS320F2812 DSP that is a 32-bit fixed-point processor operating at 150 MHz. The simulation and experimental results are compared to previous studies. The THD ratios of phase voltages and currents are measured loading the inverter with a three- phase 3 kW asynchronous motor. The lowest THD ratios of voltage and current are obtained at 1.9% and 0.4%, respectively.
Author Colak, Ilhami
Kabalci, Ersan
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Issue 18
Keywords Sinusoidal pulse width modulation
Total harmonic distortion analysis
Digital signal processors
Multilevel inverter
Motor drives
Power converter
Power system harmonics
Power system stability
Harmonic analysis
Power electronics
Implementation
Energy quality
Harmonic distortion
Pulse duration modulation
Digital signal processor
Service quality
Multilevel system
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Snippet ► An enhanced analytical model of SPWM is developer in this paper. ► In addition to base band harmonics that are considered in regular SPWM, we eliminated the...
This paper presents a digital signal processor (DSP) based algorithm to generate three-level output voltage using H-Bridge multilevel inverter (MLI). The...
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StartPage 7585
SubjectTerms Applied sciences
Digital signal processing
Digital signal processors
Electric potential
Electrical engineering. Electrical power engineering
Electrical machines
Electrical power engineering
Exact sciences and technology
Harmonic distortion
Harmonics
Inverters
Microprocessors
Multilevel inverter
Operation. Load control. Reliability
Power electronics, power supplies
Power networks and lines
Pulse duration modulation
Regulation and control
Sinusoidal pulse width modulation
Theory. Simulation
Total harmonic distortion analysis
Voltage
Title Practical implementation of a digital signal processor controlled multilevel inverter with low total harmonic distortion for motor drive applications
URI https://dx.doi.org/10.1016/j.jpowsour.2011.04.044
https://www.proquest.com/docview/1777137550
https://www.proquest.com/docview/896207012
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