APA (7th ed.) Citation

Godi, P. K., Krishna, B. T., & Kotipalli, P. (2020). Design optimisation of multiplier-free parallel pipelined FFT on field programmable gate array. IET circuits, devices & systems, 14(7), 995-1000. https://doi.org/10.1049/iet-cds.2019.0512

Chicago Style (17th ed.) Citation

Godi, Prasanna Kumar, Battula Tirumala Krishna, and Pushpa Kotipalli. "Design Optimisation of Multiplier-free Parallel Pipelined FFT on Field Programmable Gate Array." IET Circuits, Devices & Systems 14, no. 7 (2020): 995-1000. https://doi.org/10.1049/iet-cds.2019.0512.

MLA (9th ed.) Citation

Godi, Prasanna Kumar, et al. "Design Optimisation of Multiplier-free Parallel Pipelined FFT on Field Programmable Gate Array." IET Circuits, Devices & Systems, vol. 14, no. 7, 2020, pp. 995-1000, https://doi.org/10.1049/iet-cds.2019.0512.