Comparison of network-on-chip mapping algorithms targeting low energy consumption - Marcon, C.A.M.; Moreno, E.I.; Calazans, N.L.V.; Moraes, F.G. (IET computers & digital techniques, 2008)
Keywords: Algorithms; Applied sciences; Design. Technologies. Operation analysis. Testing; Electronics; Energy conservation; Exact sciences and technology; Integrated circuits; Low cycle fatigue; Low energy; Mapping; Mathematical models; Reduction; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Stochasticity; Interconnection network; Energy economy; Network architecture; Mapping; System on a chip; Stochastic method; Search algorithm; Power consumption; Integrated circuit; Heuristic method; Simulated annealing; Low-power electronics; Comparative study; Execution time