Architecture of Generalized Bit-Flipping Decoding for High-Rate Non-binary LDPC Codes - García-Herrero, F.; Canet, M. J.; Valls, J. (Circuits, systems, and signal processing, 2013)
Keywords: Algorithms; Architecture; Circuits; Circuits and Systems; Codes; Decoding; Devices; Electrical Engineering; Electronics and Microelectronics; Engineering; Field programmable gate arrays; Instrumentation; Noise levels; Signal,Image and Speech Processing; VLSI; Non-binary low-density parity-check (LDPC) codes; VLSI; Decoder; Galois field