NEDA: a low-power high-performance DCT architecture - Shams, A.M.; Chidanandan, A.; Pan, W.; Bayoumi, M.A. (IEEE transactions on signal processing, 2006)
Keywords: Access methods and protocols, osi model; Adders; Application specific integrated circuits; Applied sciences; Architecture; Arithmetic; Arrays; Complement; Compressing; Costs; Digital signal processing; Digital signal processing chips; Discrete cosine transform (DCT); Discrete cosine transforms; distributed arithmetic; Exact sciences and technology; Hardware; High speed; Information, signal and communications theory; inner product; Mathematical analysis; Miscellaneous; Read only memory; Redundancy; ROM-free multiplication; Signal processing; Signal processing algorithms; Telecommunications; Telecommunications and information theory; Teleprocessing networks. Isdn; Access control; Performance evaluation; Circuit design; Discrete cosine transform (DCT); High precision; Word length; Digital processing; Implementation; ROM-free multiplication; Mathematical analysis; inner product; Discrete cosine transforms; Read only memory(ROM); Redundancy; Finite word; Adder; Power consumption; High power; Simulation; distributed arithmetic; Integrated circuit; Integrated design; Signal processing; Digital signal processor; Comparative study