APA (7th ed.) Citation

Shams, A., Chidanandan, A., Pan, W., & Bayoumi, M. (2006). NEDA: A low-power high-performance DCT architecture. IEEE transactions on signal processing, 54(3), 955-964. https://doi.org/10.1109/TSP.2005.862755

Chicago Style (17th ed.) Citation

Shams, A.M, A. Chidanandan, W. Pan, and M.A Bayoumi. "NEDA: A Low-power High-performance DCT Architecture." IEEE Transactions on Signal Processing 54, no. 3 (2006): 955-964. https://doi.org/10.1109/TSP.2005.862755.

MLA (9th ed.) Citation

Shams, A.M, et al. "NEDA: A Low-power High-performance DCT Architecture." IEEE Transactions on Signal Processing, vol. 54, no. 3, 2006, pp. 955-964, https://doi.org/10.1109/TSP.2005.862755.