EKV3 compact modeling of MOS transistors from a 0.18 μm CMOS technology for mixed analog–digital circuit design at low temperature
The standard version of the EKV3 compact model is evaluated for simulation of mixed analog–digital circuits working at low temperature (77–200 K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18 μm/1.8 V and 0.35 μm/3.3 V MOSFET transistors. A detailed temperature analysi...
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| Published in | Cryogenics (Guildford) Vol. 49; no. 11; pp. 595 - 598 |
|---|---|
| Main Authors | , , , , |
| Format | Journal Article Conference Proceeding |
| Language | English |
| Published |
Kidlington
Elsevier Ltd
01.11.2009
Elsevier |
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| Online Access | Get full text |
| ISSN | 0011-2275 1879-2235 |
| DOI | 10.1016/j.cryogenics.2008.12.005 |
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| Abstract | The standard version of the EKV3 compact model is evaluated for simulation of mixed analog–digital circuits working at low temperature (77–200
K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18
μm/1.8
V and 0.35
μm/3.3
V MOSFET transistors. A detailed temperature analysis of some physical effects is performed. Specific effects, such as anomalous narrow channel effect, freeze-out in Lightly Doped drain (LDD) regions or quantization of the inversion charge, are observed at low or intermediate temperature. Some improvements of this compact model will allow a more accurate description of MOS transistors at low temperature. |
|---|---|
| AbstractList | The standard version of the EKV3 compact model is evaluated for simulation of mixed analog–digital circuits working at low temperature (77–200
K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18
μm/1.8
V and 0.35
μm/3.3
V MOSFET transistors. A detailed temperature analysis of some physical effects is performed. Specific effects, such as anomalous narrow channel effect, freeze-out in Lightly Doped drain (LDD) regions or quantization of the inversion charge, are observed at low or intermediate temperature. Some improvements of this compact model will allow a more accurate description of MOS transistors at low temperature. The standard version of the EKV3 compact model is evaluated for simulation of mixed analog-digital circuits working at low temperature (77-200 K). This evaluation is performed on a dual gate oxide CMOS technology with 0.18 mu m/1.8 V and 0.35 mu m/3.3 V MOSFET transistors. A detailed temperature analysis of some physical effects is performed. Specific effects, such as anomalous narrow channel effect, freeze-out in Lightly Doped drain (LDD) regions or quantization of the inversion charge, are observed at low or intermediate temperature. Some improvements of this compact model will allow a more accurate description of MOS transistors at low temperature. |
| Author | Martin, P. Fascio, R. Ghibaudo, G. Bucher, M. Cavelier, M. |
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| Cites_doi | 10.1109/55.735763 10.1016/0038-1101(94)E0055-J 10.1117/12.719171 |
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| Keywords | MOSFET EKV3 compact model Low temperature Analog circuit Improvement Simulation Cryogenics Digital circuit Modeling |
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| References | Guellec F, Villard P, Rothan F, Alacoque L, Chancel C, Martin P, et al. Sigma-delta column-wise A/D conversion for cooled ROIC. In: SPIE Proceedings, 2007, vol. 6542, Infrared technology and applications XXXIII. K) and analog circuit design. In: Proceedings of the 6th European workshop on low temperature electronics, WOLTE-6, ESTEC, Noordwijk, The Netherlands; 2004. p. 133–6. Bazigos A, Bucher M, Krummenacher F, Sallese JM, Roy AS, Enz C. EKV3 compact MOSFET model documentation, model version 301.02 Technical report, Technical University of Crete, September 2; 2008. Martin P, Bucher M. Comparaison of 0.35 and 0.21 1997. Szelag, Balestra, Ghibaudo (bib5) 1998; 19 μm CMOS technologies for low temperature operation (77–200 Emrani A. Propriétés électriques et modèles physiques des composants MOS à basse température pour la cryomicroélectronique, INPG thesis, Grenoble; 1992. Hafez, Ghibaudo, Balestra, Haond (bib7) 1995; 38 Bucher M, Lallement C, Enz C, Théodoloz F, Krummenacher F. The EPFL-EKV MOSFET model equations for simulation, version 2.6, EPFL technical report 10.1016/j.cryogenics.2008.12.005_bib6 10.1016/j.cryogenics.2008.12.005_bib4 Szelag (10.1016/j.cryogenics.2008.12.005_bib5) 1998; 19 10.1016/j.cryogenics.2008.12.005_bib3 10.1016/j.cryogenics.2008.12.005_bib2 Hafez (10.1016/j.cryogenics.2008.12.005_bib7) 1995; 38 10.1016/j.cryogenics.2008.12.005_bib1 |
| References_xml | – reference: Bucher M, Lallement C, Enz C, Théodoloz F, Krummenacher F. The EPFL-EKV MOSFET model equations for simulation, version 2.6, EPFL technical report, < – reference: >; 1997. – reference: Martin P, Bucher M. Comparaison of 0.35 and 0.21 – volume: 38 start-page: 419 year: 1995 end-page: 424 ident: bib7 article-title: Impact of LDD structures on the operation of silicon MOSFET’s at low temperature publication-title: Solid State Electron – reference: Guellec F, Villard P, Rothan F, Alacoque L, Chancel C, Martin P, et al. Sigma-delta column-wise A/D conversion for cooled ROIC. In: SPIE Proceedings, 2007, vol. 6542, Infrared technology and applications XXXIII. – volume: 19 start-page: 511 year: 1998 end-page: 513 ident: bib5 article-title: Comprehensive analysis of reverse short-channel effect in silicon MOSFET’s from low-temperature operation publication-title: IEEE Electron Dev Lett – reference: μm CMOS technologies for low temperature operation (77–200 – reference: Emrani A. Propriétés électriques et modèles physiques des composants MOS à basse température pour la cryomicroélectronique, INPG thesis, Grenoble; 1992. – reference: K) and analog circuit design. In: Proceedings of the 6th European workshop on low temperature electronics, WOLTE-6, ESTEC, Noordwijk, The Netherlands; 2004. p. 133–6. – reference: Bazigos A, Bucher M, Krummenacher F, Sallese JM, Roy AS, Enz C. EKV3 compact MOSFET model documentation, model version 301.02 Technical report, Technical University of Crete, September 2; 2008. – volume: 19 start-page: 511 issue: 12 year: 1998 ident: 10.1016/j.cryogenics.2008.12.005_bib5 article-title: Comprehensive analysis of reverse short-channel effect in silicon MOSFET’s from low-temperature operation publication-title: IEEE Electron Dev Lett doi: 10.1109/55.735763 – volume: 38 start-page: 419 issue: 2 year: 1995 ident: 10.1016/j.cryogenics.2008.12.005_bib7 article-title: Impact of LDD structures on the operation of silicon MOSFET’s at low temperature publication-title: Solid State Electron doi: 10.1016/0038-1101(94)E0055-J – ident: 10.1016/j.cryogenics.2008.12.005_bib2 – ident: 10.1016/j.cryogenics.2008.12.005_bib3 – ident: 10.1016/j.cryogenics.2008.12.005_bib4 – ident: 10.1016/j.cryogenics.2008.12.005_bib6 – ident: 10.1016/j.cryogenics.2008.12.005_bib1 doi: 10.1117/12.719171 |
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| Snippet | The standard version of the EKV3 compact model is evaluated for simulation of mixed analog–digital circuits working at low temperature (77–200
K). This... The standard version of the EKV3 compact model is evaluated for simulation of mixed analog-digital circuits working at low temperature (77-200 K). This... |
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| SubjectTerms | Applied sciences Channels Circuit design CMOS Cryogenics EKV3 compact model Energy Energy. Thermal use of fuels Exact sciences and technology Low temperature Mathematical models Metal oxide semiconductors MOSFET MOSFETs Refrigerating engineering. Cryogenics. Food conservation Semiconductor devices Transistors |
| Title | EKV3 compact modeling of MOS transistors from a 0.18 μm CMOS technology for mixed analog–digital circuit design at low temperature |
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