Concurrent Error Detection in Finite-Field Arithmetic Operations Using Pipelined and Systolic Architectures - Bayat-Sarmadi, S.; Hasan, M.A. (IEEE transactions on computers, 2009)
Keywords: Arithmetic; Computer architecture; concurrent error correction (CEC); concurrent error detection (CED); Decoding; dual basis; Encoding; Error correction; Error detection; Faults; Finite-field operations; Multipliers; Niobium; normal basis; Optimization; Pipeline processing; pipelined architectures; polynomial basis; Polynomials; Registers; Systolic arrays