Theory of transparent BIST for RAMs

I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and transforms it into a transparent one. The interest of the transparent test algorithms is that testing preserves the contents of the RAM. The transparent test algori...

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Published inIEEE transactions on computers Vol. 45; no. 10; pp. 1141 - 1156
Main Author Nicolaidis, M.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.10.1996
Institute of Electrical and Electronics Engineers
Subjects
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ISSN0018-9340
DOI10.1109/12.543708

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Abstract I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and transforms it into a transparent one. The interest of the transparent test algorithms is that testing preserves the contents of the RAM. The transparent test algorithm is then used to implement a transparent BIST. This kind of BIST is very suitable for periodic testing of RAMs. The theoretical analysis shows that this transparent BIST technique does not decrease the fault coverage for modeled faults, it behaves better for unmodeled ones and does not increase the aliasing with respect to the initial test algorithm. Furthermore, transparent BIST involves only slightly higher area overhead with respect to standard BIST. Thus, transparent BIST becomes more attractive than standard BIST since it can be used for both fabrication testing and periodic testing.
AbstractList In this paper I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and transforms it into a transparent one. The interest of the transparent test algorithms is that testing preserves the contents of the RAM. The transparent test algorithm is then used to implement a transparent BIST. This kind of BIST is very suitable for periodic testing of RAMs. The theoretical analysis presented here shows that this transparent BIST technique does not decrease the fault coverage for modeled faults, it behaves better for unmodeled ones and does not increase the aliasing with respect to the initial test algorithm. Furthermore, transparent BIST involves only slightly higher area overhead with respect to standard BIST. Thus, transparent BIST becomes more attractive than standard BIST since it can be used for both fabrication testing and periodic testing.
I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and transforms it into a transparent one. The interest of the transparent test algorithms is that testing preserves the contents of the RAM. The transparent test algorithm is then used to implement a transparent BIST. This kind of BIST is very suitable for periodic testing of RAMs. The theoretical analysis shows that this transparent BIST technique does not decrease the fault coverage for modeled faults, it behaves better for unmodeled ones and does not increase the aliasing with respect to the initial test algorithm. Furthermore, transparent BIST involves only slightly higher area overhead with respect to standard BIST. Thus, transparent BIST becomes more attractive than standard BIST since it can be used for both fabrication testing and periodic testing.
I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and transforms it into a transparent one. The interest of the transparent test algorithms is that testing preserves the contents of the RAM. The transparent test algorithm is then used to implement a transparent BIST. This kind of BIST is very suitable for periodic testing of RAMs. The theoretical analysis shows that this transparent BIST technique does not decrease the fault coverage for modeled faults, it behaves better for unmodeled ones and does not increase the aliasing with respect to the initial test algorithm. Furthermore, transparent BIST involves only slightly higher area overhead with respect to standard BIST. Thus, transparent BIST becomes more attractive than standard BIST since it can be used for both fabrication testing and periodic testing
Author Nicolaidis, M.
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Cites_doi 10.1109/TC.1980.1675610
10.1109/TC.1985.1676547
10.1109/TC.1980.1675556
10.1109/ICCD.1992.276223
10.1109/92.365454
10.1109/43.62779
10.1109/TC.1978.1675150
10.1109/TC.1981.1675739
10.1109/TC.1985.1676572
10.1109/ETC.1993.246573
10.1109/TEST.1992.527880
10.1145/78949.78950
10.1109/TC.1980.1675601
10.1109/ICCAD.1991.185244
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Issue 10
Keywords Direct access
Storage management
Algorithm complexity
Random access storage
Signature analysis
Failures
Modeling
Addressing
transparent-test-algorithms
fault-coverage
RAM-test-algorithm
modeled-faults
fabrication-testing
periodic-testing
aliasing
transparent-BIST
Language English
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nicolaidis (bibt114119) 1985
bibt114114
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bibt11416
bibt11417
bibt11418
bibt11419
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bibt11413
bibt11414
bibt11411
koeneman (bibt114120) 1986
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  doi: 10.1109/ICCAD.1991.185244
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Snippet I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and transforms it into a...
In this paper I present the theoretical aspects of a technique called transparent BIST for RAMs. This technique applies to any RAM test algorithm and...
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StartPage 1141
SubjectTerms Algorithm design and analysis
Algorithmics. Computability. Computer arithmetics
Applied sciences
Built-in self-test
Circuit faults
Circuit testing
Compaction
Computer science; control theory; systems
Electronics
Engineering Sciences
Exact sciences and technology
Fault detection
Handwriting recognition
Integrated circuits
Integrated circuits by function (including memories and processors)
Manufacturing
Memory and file management (including protection and security)
Memory organisation. Data processing
Micro and nanotechnologies
Microelectronics
Performance evaluation
Read-write memory
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Software
Theoretical computing
Title Theory of transparent BIST for RAMs
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