Low complexity bit-parallel polynomial basis multipliers over binary fields for special irreducible pentanomials - Imaña, José L.; Hermida, Román; Tirado, Francisco (Integration (Amsterdam), 2013)
Keywords: Algorithms; Applied sciences; Arithmetic; Bit-parallel multipliers; Blocking; Circuit properties; Complexity; Cryptography; Design. Technologies. Operation analysis. Testing; Digital circuits; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Finite field arithmetic; formula omitted; Gates; Integrated circuits; Irreducible pentanomials; Mathematical analysis; Matrix decomposition; Multipliers; Polynomial basis; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; GF(2m); Bit-parallel multipliers; Finite field arithmetic; Matrix decomposition; Polynomial basis; Irreducible pentanomials; Complexity; Finite field; Arithmetic circuit; XOR circuit; Logic gate; ); Space time; Algorithm; Field experiment; Logic circuit; Coding; Integrated circuit; Arithmetic operation; Cryptography; Computer algebra; Time complexity; Multiplying circuits; GF