Symmetric tunnel field-effect transistor (S-TFET)

A novel heterojunction symmetric tunnel field-effect transistor (S-TFET) has been proposed and investigated, for the first time, in order to address the inborn technical challenges of the conventional p-i-n TFET (i.e., asymmetric TFET). With a band-to-band tunneling process between the germanium sou...

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Published inCurrent applied physics Vol. 15; no. 2; pp. 71 - 77
Main Authors Nam, Hyohyun, Cho, Min Hee, Shin, Changhwan
Format Journal Article
LanguageEnglish
Published Elsevier B.V 01.02.2015
한국물리학회
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ISSN1567-1739
1878-1675
DOI10.1016/j.cap.2014.11.006

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Abstract A novel heterojunction symmetric tunnel field-effect transistor (S-TFET) has been proposed and investigated, for the first time, in order to address the inborn technical challenges of the conventional p-i-n TFET (i.e., asymmetric TFET). With a band-to-band tunneling process between the germanium source/drain region and the silicon channel region, the theoretical limit of the subthreshold slope (SS) can be overcome (i.e., SS ∼ 45mV/decade). The bidirectional current flow in the S-TFET is implemented with a p-n-p structure. And better performance in the S-TFET is achieved with a thin silicon-pad layer below the source/drain regions. The effects of source/drain/channel doping concentration and thickness on the performance of the device are investigated in order to create an S-TFET design guideline. In the future, the S-TFET will be one of the promising device structures for ultra-low-power applications, especially in integrated circuits that operate with a half-volt power supply voltage. •A novel symmetric tunnel field-effect transistor (S-TFET) is proposed.•The S-TFET can overcome the physical limit of sub-threshold slope (60mV/decade).•The proposed S-TFET can achieve not uni-directional but bi-directional current flow.•Device design guidelines for the proposed S-TFET is discuss in detail.
AbstractList A novel heterojunction symmetric tunnel field-effect transistor (S-TFET) has been proposed and investigated, for the first time, in order to address the inborn technical challenges of the conventional p-i-n TFET (i.e., asymmetric TFET). With a band-to-band tunneling process between the germanium source/drain region and the silicon channel region, the theoretical limit of the subthreshold slope (SS) can be overcome (i.e., SS ∼ 45mV/decade). The bidirectional current flow in the S-TFET is implemented with a p-n-p structure. And better performance in the S-TFET is achieved with a thin silicon-pad layer below the source/drain regions. The effects of source/drain/channel doping concentration and thickness on the performance of the device are investigated in order to create an S-TFET design guideline. In the future, the S-TFET will be one of the promising device structures for ultra-low-power applications, especially in integrated circuits that operate with a half-volt power supply voltage. •A novel symmetric tunnel field-effect transistor (S-TFET) is proposed.•The S-TFET can overcome the physical limit of sub-threshold slope (60mV/decade).•The proposed S-TFET can achieve not uni-directional but bi-directional current flow.•Device design guidelines for the proposed S-TFET is discuss in detail.
A novel heterojunction symmetric tunnel field-effect transistor (S-TFET) has been proposed and investigated, for the first time, in order to address the inborn technical challenges of the conventional p-i-n TFET (i.e., asymmetric TFET). With a band-to-band tunneling process between the germanium source/ drain region and the silicon channel region, the theoretical limit of the subthreshold slope (SS) can be overcome (i.e., SS ~ 45 mV/decade). The bidirectional current flow in the S-TFET is implemented with a pn- p structure. And better performance in the S-TFET is achieved with a thin silicon-pad layer below the source/drain regions. The effects of source/drain/channel doping concentration and thickness on the performance of the device are investigated in order to create an S-TFET design guideline. In the future, the S-TFET will be one of the promising device structures for ultra-low-power applications, especially in integrated circuits that operate with a half-volt power supply voltage. KCI Citation Count: 11
A novel heterojunction symmetric tunnel field-effect transistor (S-TFET) has been proposed and investigated, for the first time, in order to address the inborn technical challenges of the conventional p-i-n TFET (i.e., asymmetric TFET). With a band-to-band tunneling process between the germanium source/drain region and the silicon channel region, the theoretical limit of the subthreshold slope (SS) can be overcome (i.e., SS similar to 45 mV/decade). The bidirectional current flow in the S-TFET is implemented with a p-n-p structure. And better performance in the S-TFET is achieved with a thin silicon-pad layer below the source/drain regions. The effects of source/drain/channel doping concentration and thickness on the performance of the device are investigated in order to create an S-TFET design guideline. In the future, the S-TFET will be one of the promising device structures for ultra-low-power applications, especially in integrated circuits that operate with a half-volt power supply voltage.
Author Nam, Hyohyun
Shin, Changhwan
Cho, Min Hee
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Keywords MOSFET
CMOS
Tunnel field-effect transistor (TFET)
Steep switching device
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Snippet A novel heterojunction symmetric tunnel field-effect transistor (S-TFET) has been proposed and investigated, for the first time, in order to address the inborn...
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SubjectTerms Channels
CMOS
Devices
Doping
Drains
Electric potential
Field effect transistors
MOSFET
Semiconductor devices
Slopes
Steep switching device
Tunnel field-effect transistor (TFET)
Tunnels (transportation)
물리학
Title Symmetric tunnel field-effect transistor (S-TFET)
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