Design and development of symmetrical super-lift DC–AC converter using firefly algorithm for solar-photovoltaic applications

• Published in: IET circuits, devices & systems Vol. 14; no. 3; pp. 261 - 269
• Main Authors: Albert, Johny Renoald, Stonier, Albert Alexander
• Format: Journal Article
• Language: English
• Published: Stevenage The Institution of Engineering and Technology 01.05.2020; John Wiley & Sons, Inc
• Subjects: Algorithms; Circuits; DC-AC power convertors; DC-DC power convertors; DC–DC conversion technology; fast Fourier transform framework; Fast Fourier transformations; fast Fourier transforms; Field programmable gate arrays; firefly algorithm; firefly rule; Gate arrays; Harmonic distortion; Heuristic methods; Inductors; Inverters; invertors; low distortion output; minimum total harmonic distortion; Multilevel; multilevel output; PWM invertors; Research Article; single switch super-lift inverter feed; SLMLI topology; solar-photovoltaic applications; super-lift DC–AC converter; super-lift technique; Temperature; Topology; traditional multilevel inverter; fast Fourier transforms; super-lift technique; field programmable gate arrays; harmonic distortion; fast Fourier transform framework; firefly rule; minimum total harmonic distortion; low distortion output; DC-DC power convertors; DC–DC conversion technology; DC-AC power convertors; PWM invertors; single switch super-lift inverter feed; invertors; traditional multilevel inverter; SLMLI topology; solar-photovoltaic applications; super-lift DC–AC converter; firefly algorithm; multilevel output
• ISSN: 1751-858X; 1751-8598; 1751-8598
• DOI: 10.1049/iet-cds.2018.5292

The super-lift technique is an exceptional contribution to DC–DC conversion technology. A replacement approach of symmetrical super-lift multilevel inverter (SLMLI) DC/AC technology is proposed with a reduced number of elements compared with the traditional multilevel inverter. In this method, the firefly algorithm conveys a leading task for the SLMLI topology for solar-photovoltaic applications. It generates low distortion output and consumes the harmonic band of the fast Fourier transform framework by the employment of the proposed algorithm. The simulation circuit for 15 levels output uses single switch super-lift inverter feed with different kinds of load (R, RL and RLE) conditions. The power quality is improved in SLMLI with minimised harmonics underneath the various modulation indices while varied from 0.1 up to 0.8. The circuit is designed in a field-programmable gate array, which includes the firefly rule to help the multilevel output, to reduce the lower order harmonics and to find the best switching angle. As a result, the minimum total harmonic distortion from the simulation and hardware circuit is achieved. Due to the absence of bulky switches, inductor and filter elements expose the effectiveness of the proposed system.