Modern Trends in Improving the Technical Characteristics of Devices and Systems for Digital Image Processing

• Published in: IEEE access Vol. 12; p. 1
• Main Authors: Nagornov, Nikolay N., Lyakhov, Pavel A., Bergerman, Maxim V., Kalita, Diana I.
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 01.01.2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Application specific integrated circuits; ASIC; Data processing; Devices; Digital imaging; Electronics packaging; energy-efficient architecture; Field programmable gate arrays; FPGA; Hardware; hardware accelerator; High-performance computing; Image processing; Immersion plating; Integrated circuit modeling; low-area design; low-power device; neural network; Neural networks; Reviews; Trends
• ISSN: 2169-3536; 2169-3536
• DOI: 10.1109/ACCESS.2024.3381493

The technology development greatly increases the amount of digital visual information. Existing devices cannot efficiently process such huge amounts of data. The technical characteristics of digital image processing (DIP) devices and systems are being actively improved to resolve this contradiction in science and technology. The state-of-the-art methodology includes a huge number of very diverse approaches at the mathematical, software, and hardware implementation levels. We have analyzed all modern trends to improve the technical characteristics of DIP devices and systems. The main distinguishing feature of this review is that we are not limited to considering various aspects of neural network image processing, to which the vast majority of both review and research papers on the designated topic are devoted. Review papers on the subject under consideration are analyzed. Various mathematical and arithmetic-logical methods for improving the characteristics of image processing devices are described in detail. Original and significant architectural and structural solutions are analyzed. Promising neural network models of visual data processing are characterized. Hardware platforms for the design and operation of DIP systems that are efficient in terms of resource costs are considered. The most significant improvements achieved through the hardware implementation of models and methods on field-programmable gate arrays and application-specific integrated circuits are noted.