WRA: A 2.2-to-6.3 TOPS Highly Unified Dynamically Reconfigurable Accelerator Using a Novel Winograd Decomposition Algorithm for Convolutional Neural Networks - Yang, Chen; Wang, Yizhou; Wang, Xiaoli; Geng, Li (IEEE transactions on circuits and systems. I, Regular papers, 2019)
Keywords: Acceleration; Algorithms; Artificial neural networks; Computer architecture; Convolution; convolution decomposition; Convolutional neural network; data reuse; Decomposition; Energy efficiency; Hardware; Microprocessors; Neural networks; Parallel processing; Power efficiency; reconfigurable; Reconfiguration; Shape; Throughput; Winograd