Test scheduling for system on chip using modified firefly and modified ABC algorithms

• Published in: SN applied sciences Vol. 1; no. 9; p. 1079
• Main Authors: Chandrasekaran, Gokul, Periyasamy, Sakthivel, Karthikeyan, P. R.
• Format: Journal Article
• Language: English
• Published: Cham Springer International Publishing 01.09.2019; Springer Nature B.V
• Subjects: Algorithms; Applied and Technical Physics; Benchmarks; Chemistry/Food Science; Circuits; Communications and Multimedia; Earth Sciences; Electronic components; Engineering; Engineering: Innovative Computing Technologies: Digital Information; Environment; Food; Foraging behavior; Heuristic methods; Manufacturing defects; Materials Science; Optimization algorithms; Optimization techniques; Packing problem; Pheromones; Random variables; Research Article; Scheduling; Semiconductors; System on chip; Testing time; Integrated circuits; Ant colony optimization; System-on-chip; Firefly algorithm artificial bee colony optimization
• ISSN: 2523-3963; 2523-3971; 2523-3971
• DOI: 10.1007/s42452-019-1116-x

The system-on-chip (SoC) is an integration of millions of electronic components, there is always a chance for faults to occur due to manufacturing defects. In order to solve this problem, it is essential to test the manufactured chips. The time spent on testing increases the testing cost which reflects on the cost of the chip. While testing the SoC, core accessibility and testing time are the main issues to be considered. In order to reduce the testing time, test scheduling has to be performed in an effective manner. In this article ACO, Modified ACO, ABC, Modified ABC, Firefly and Modified Firefly test scheduling algorithms were tested on two SoC benchmark circuits. Experimental results show that the Modified ABC algorithm performs better than the other algorithms used in test scheduling. When compared with ACO, Modified ACO, ABC, Firefly and Modified Firefly algorithms, the Modified ABC algorithm’s testing time has been reduced by 82%, 69%, 25%, 43% and 48% for d695 SoC and 80%, 73%, 20%, 41% and 47% for p22810 SoC benchmark circuits respectively.