Nonlinearity-Induced Spur Analysis in Fractional-N Synthesizers With ΔΣ Quantization Cancellation

• Published in: IEEE open journal of solid-state circuits Vol. 4; pp. 226 - 237
• Main Authors: Hu, Yizhe, Tao, Weichen, Staszewski, Robert Bogdan
• Format: Journal Article
• Language: English
• Published: New York IEEE 2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: All-digital phase-locked loop (ADPLL); Converters; Delays; Delta-sigma modulation; delta–sigma modulator (DSM); digital-to-time converter (DTC); fractional-N; Frequency modulation; Frequency synthesizers; integral nonlinearity (INL); Jitter; Millimeter wave communication; millimeter-wave (mmWave); Multi-stage noise shaping; Phase locked loops; Phase modulation; Phase noise; Quantization (signal); spur; Synthesis; Synthesizers; Time-domain analysis
• ISSN: 2644-1349; 2644-1349
• DOI: 10.1109/OJSSCS.2024.3476035

A fractional-N frequency synthesizer with low total jitter [e.g., <50fsrms, accounting for both phase noise (PN) and spurs] is essential for enabling the emerging 5G/6G and other high-speed wireless communication standards (e.g., WiFi-6/7). While fractional-N phase-locked loops (PLLs) and injection-locking techniques with delta-sigma <inline-formula> <tex-math notation="LaTeX">(\Delta \Sigma ) </tex-math></inline-formula> quantization cancellation using a digital-to-time converter (DTC) (and more recently, DACs) have demonstrated low-jitter performance and are well understood in terms of PN, their spur mechanisms still lack a comprehensive quantitative analysis. In this article, we present a unified theoretical framework for spur analysis, based on the time-domain characteristics of spurs, addressing both instantaneous phase modulation and frequency modulation mechanisms. This approach serves as a thorough guide for choosing a low-jitter fractional-N architecture, considering the integral nonlinearity (INL) shaping of DTCs (or DACs) under the control of either a first- or second-order <inline-formula> <tex-math notation="LaTeX">\Delta \Sigma </tex-math></inline-formula> modulator (DSM). The framework also extends to reference spurs in both charge-pump PLLs (CP-PLLs) and injection-locked synthesizers. The analytical results of spurs are numerically verified through time-domain behavioral simulations and further validated by experimental results from the literature, thereby demonstrating their effectiveness.