Fast sign-detection algorithm for residue number system moduli set {2n − 1, 2n, 2n+1 − 1}
Sign detection is an essential part of many computer hardware designs, and is not a trivial task in residue number systems because it is a function of all the residues. This study proposes an algorithm for the residue number system with a three-moduli set {2n − 1, 2n, 2n+1 − 1} using New Chinese Rem...
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| Published in | Chronic diseases and translational medicine Vol. 10; no. 2; pp. 54 - 58 |
|---|---|
| Main Authors | , |
| Format | Journal Article |
| Language | English |
| Published |
Beijing
The Institution of Engineering and Technology
01.03.2016
John Wiley & Sons, Inc |
| Subjects | |
| Online Access | Get full text |
| ISSN | 1751-8601 1751-861X 2095-882X 1751-861X 2589-0514 |
| DOI | 10.1049/iet-cdt.2015.0050 |
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| Abstract | Sign detection is an essential part of many computer hardware designs, and is not a trivial task in residue number systems because it is a function of all the residues. This study proposes an algorithm for the residue number system with a three-moduli set {2n − 1, 2n, 2n+1 − 1} using New Chinese Remainder Theorem II. The unit is built with one n-bit carry-save adder and a 2n-bit parallel prefix carry-generation unit. In the best case the Synoposys 90 nm synthesis result shows a 24% reduction in the area–delay product than existing algorithms for the same moduli set. |
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| AbstractList | Sign detection is an essential part of many computer hardware designs, and is not a trivial task in residue number systems because it is a function of all the residues. This study proposes an algorithm for the residue number system with a three‐moduli set {2n − 1, 2n, 2n+1 − 1} using New Chinese Remainder Theorem II. The unit is built with one n‐bit carry‐save adder and a 2n‐bit parallel prefix carry‐generation unit. In the best case the Synoposys 90 nm synthesis result shows a 24% reduction in the area–delay product than existing algorithms for the same moduli set. Sign detection is an essential part of many computer hardware designs, and is not a trivial task in residue number systems because it is a function of all the residues. This study proposes an algorithm for the residue number system with a three‐moduli set {2 n − 1, 2 n , 2 n +1 − 1} using New Chinese Remainder Theorem II. The unit is built with one n ‐bit carry‐save adder and a 2 n ‐bit parallel prefix carry‐generation unit. In the best case the Synoposys 90 nm synthesis result shows a 24% reduction in the area–delay product than existing algorithms for the same moduli set. Sign detection is an essential part of many computer hardware designs, and is not a trivial task in residue number systems because it is a function of all the residues. This study proposes an algorithm for the residue number system with a three-moduli set {2 super(n) - 1, 2 super(n), 2 super(n+1) - 1} using New Chinese Remainder Theorem II. The unit is built with one n-bit carry-save adder and a 2n-bit parallel prefix carry-generation unit. In the best case the Synoposys 90 nm synthesis result shows a 24% reduction in the area-delay product than existing algorithms for the same moduli set. |
| Author | Kong, Yinan Niras, Cheeckottu Vayalil |
| Author_xml | – sequence: 1 givenname: Cheeckottu Vayalil surname: Niras fullname: Niras, Cheeckottu Vayalil email: niras.cheeckottu-vayalil@mq.edu.au organization: Department of Engineering, Macquarie University, Sydney 2109, NSW, Australia – sequence: 2 givenname: Yinan surname: Kong fullname: Kong, Yinan organization: Department of Engineering, Macquarie University, Sydney 2109, NSW, Australia |
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| Cites_doi | 10.1109/12.250610 10.1109/ICCSII.2012.6454344 10.1109/ARITH.1999.762841 10.1109/12.257703 10.1109/TC.1973.5009159 10.1049/el.2014.2029 10.1016/S1383-7621(97)00085-4 10.1142/p523 10.1109/TEC.1962.5219388 10.1109/TCSI.2008.917994 10.1109/ACSSC.2004.1399373 10.1109/TC.1985.1676602 10.1109/ISCAS.2014.6865441 10.1016/S0898-1221(03)90191-X |
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| Keywords | size 90 nm residue number system moduli set {2n − 1, 2n, 2n+1 − 1} Synoposys synthesis adders 2n-bit parallel prefix carry-generation unit area-delay product fast sign-detection algorithm n-bit carry-save adder computer hardware designs New Chinese Remainder Theorem II residue number systems |
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| SubjectTerms | 2n‐bit parallel prefix carry‐generation unit adders Algorithms area‐delay product computer hardware designs Computer peripherals Design engineering Digital techniques fast sign‐detection algorithm Hardware Mathematical analysis Multiplication & division New Chinese Remainder Theorem II Number systems n‐bit carry‐save adder Read only memory residue number system moduli set {2n − 1, 2n, 2n+1 − 1} Residue number systems Residues ROM size 90 nm Synoposys synthesis Tasks |
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| Title | Fast sign-detection algorithm for residue number system moduli set {2n − 1, 2n, 2n+1 − 1} |
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