Analysis of hotspots and cooling strategy for multilayer three-dimensional integrated circuits
•A new estimation formula for the effective thermal conductivity of the TIM layer.•CFD modeling and simulation of 3D stacked ICs for forced convective cooling.•Reynolds number and the stacked layers cause nonlinear temperature changes.•Stacked structure and TSV can change the location of hotspot tem...
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| Published in | Applied thermal engineering Vol. 186; p. 116336 |
|---|---|
| Main Authors | , , |
| Format | Journal Article |
| Language | English |
| Published |
Oxford
Elsevier Ltd
05.03.2021
Elsevier BV |
| Subjects | |
| Online Access | Get full text |
| ISSN | 1359-4311 1873-5606 |
| DOI | 10.1016/j.applthermaleng.2020.116336 |
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| Abstract | •A new estimation formula for the effective thermal conductivity of the TIM layer.•CFD modeling and simulation of 3D stacked ICs for forced convective cooling.•Reynolds number and the stacked layers cause nonlinear temperature changes.•Stacked structure and TSV can change the location of hotspot temperature.
The effects of geometric and thermal properties of multilayer nominal three-dimensional chip on the temperature hotspots are investigated in this work. Based on heat-transfer computational fluid dynamic analysis, various effective parameters which correlate with reducing the hotspot temperature are studied. A new analytical method for the equivalent thermal conductivity of the thermal interface material (TIM) layer and the chip layer structure in the multilayer chip is proposed, the deviation between the present results and the prior literature is less than 2%. For different chip structures and through silicon vias (TSV) arrangements, the higher the number of multi-layer chips subject to a low Reynolds number, the higher the hotspot temperature. The hotspot temperature gradually decreases linearly with an increase in the Reynolds number. For a convective cooling environment, comparing the two cases with and without the TSV, the variation of Nusselt number for the chip package surface facing the coolant is less than 1. The staggered core structure has a lower hotspot temperature for the no TSV case. When the Core-Centralized TSV is introduced, the overlapping core structure influences the internal heat dissipation the most. When the Reynolds number increases to 2000 and the number of chip layers is greater than 10, the hotspot temperature is almost insensitive to the chip layer and the hotspot temperature difference among different multilayer 3D chips does not exceed 0.2%. The layer where the hotspot temperature exists is different for different TSV arrangements. |
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| AbstractList | The effects of geometric and thermal properties of multilayer nominal three-dimensional chip on the temperature hotspots are investigated in this work. Based on heat-transfer computational fluid dynamic analysis, various effective parameters which correlate with reducing the hotspot temperature are studied. A new analytical method for the equivalent thermal conductivity of the thermal interface material (TIM) layer and the chip layer structure in the multilayer chip is proposed, the deviation between the present results and the prior literature is less than 2%. For different chip structures and through silicon vias (TSV) arrangements, the higher the number of multi-layer chips subject to a low Reynolds number, the higher the hotspot temperature. The hotspot temperature gradually decreases linearly with an increase in the Reynolds number. For a convective cooling environment, comparing the two cases with and without the TSV, the variation of Nusselt number for the chip package surface facing the coolant is less than 1. The staggered core structure has a lower hotspot temperature for the no TSV case. When the Core-Centralized TSV is introduced, the overlapping core structure influences the internal heat dissipation the most. When the Reynolds number increases to 2000 and the number of chip layers is greater than 10, the hotspot temperature is almost insensitive to the chip layer and the hotspot temperature difference among different multilayer 3D chips does not exceed 0.2%. The layer where the hotspot temperature exists is different for different TSV arrangements. •A new estimation formula for the effective thermal conductivity of the TIM layer.•CFD modeling and simulation of 3D stacked ICs for forced convective cooling.•Reynolds number and the stacked layers cause nonlinear temperature changes.•Stacked structure and TSV can change the location of hotspot temperature. The effects of geometric and thermal properties of multilayer nominal three-dimensional chip on the temperature hotspots are investigated in this work. Based on heat-transfer computational fluid dynamic analysis, various effective parameters which correlate with reducing the hotspot temperature are studied. A new analytical method for the equivalent thermal conductivity of the thermal interface material (TIM) layer and the chip layer structure in the multilayer chip is proposed, the deviation between the present results and the prior literature is less than 2%. For different chip structures and through silicon vias (TSV) arrangements, the higher the number of multi-layer chips subject to a low Reynolds number, the higher the hotspot temperature. The hotspot temperature gradually decreases linearly with an increase in the Reynolds number. For a convective cooling environment, comparing the two cases with and without the TSV, the variation of Nusselt number for the chip package surface facing the coolant is less than 1. The staggered core structure has a lower hotspot temperature for the no TSV case. When the Core-Centralized TSV is introduced, the overlapping core structure influences the internal heat dissipation the most. When the Reynolds number increases to 2000 and the number of chip layers is greater than 10, the hotspot temperature is almost insensitive to the chip layer and the hotspot temperature difference among different multilayer 3D chips does not exceed 0.2%. The layer where the hotspot temperature exists is different for different TSV arrangements. |
| ArticleNumber | 116336 |
| Author | Wang, Chao Huang, Xiao-Jie Vafai, Kambiz |
| Author_xml | – sequence: 1 givenname: Chao orcidid: 0000-0003-1309-3106 surname: Wang fullname: Wang, Chao organization: College of Computer Science, South-central University for Nationalities, Hubei, Wuhan 430074, China – sequence: 2 givenname: Xiao-Jie surname: Huang fullname: Huang, Xiao-Jie organization: Department of Mechanical Engineering, University of California, Riverside, CA 92521, USA – sequence: 3 givenname: Kambiz surname: Vafai fullname: Vafai, Kambiz email: vafai@engr.ucr.edu organization: Department of Mechanical Engineering, University of California, Riverside, CA 92521, USA |
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| SubjectTerms | Computational fluid dynamics Cooling effects Correlation analysis Fluid dynamics Fluid flow Heat conductivity Heat transfer Hotspot temperature Integrated circuits Interconnections Local Nusselt number Mathematical analysis Multilayer Three-Dimensional chips Multilayers Reynolds numbers Temperature Temperature gradients Thermal conductivity Thermal interface material(TIM) Thermodynamic properties |
| Title | Analysis of hotspots and cooling strategy for multilayer three-dimensional integrated circuits |
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