RideNN: A New Rider Optimization Algorithm-Based Neural Network for Fault Diagnosis in Analog Circuits

Fault diagnosis in electronic circuits is an emerging area of research, where fully automated diagnosis systems are being developed for the investigation of the circuits. Developing test methods for the diagnosis of faults in analog circuits is still a complex task. Consequently, a technique for the...

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Published inIEEE transactions on instrumentation and measurement Vol. 68; no. 1; pp. 2 - 26
Main Authors Binu, D., Kariyappa, B. S
Format Journal Article
LanguageEnglish
Published New York IEEE 01.01.2019
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Online AccessGet full text
ISSN0018-9456
1557-9662
DOI10.1109/TIM.2018.2836058

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Abstract Fault diagnosis in electronic circuits is an emerging area of research, where fully automated diagnosis systems are being developed for the investigation of the circuits. Developing test methods for the diagnosis of faults in analog circuits is still a complex task. Consequently, a technique for the fault diagnosis in analog circuits is designed by proposing a new optimization algorithm, named, rider optimization algorithm (ROA). The development of ROA is based on a group of riders, racing toward a target location. Moreover, a classifier, termed RideNN, is developed by including the proposed algorithm as the training algorithm for the neural network (NN). RideNN, along with the orthogonal transformation and Bhattacharyya coefficient, is applied for the fault diagnosis of analog circuits. The proposed technique is experimented using three basic circuits, such as triangular wave generator (TWG), low noise bipolar transistor amplifier (BTA), and differentiator (DIF) and an application circuit, solar power converter (SPC). The performance is evaluated using two evaluation metrics, namely, accuracy (ACC) and false alarm ratio (FAR). The analysis results show that the proposed technique attains an ACC of 99.9% in TWG, 99.9% in BTA, 99% in DIF, and 95% in SPC without noise.
AbstractList Fault diagnosis in electronic circuits is an emerging area of research, where fully automated diagnosis systems are being developed for the investigation of the circuits. Developing test methods for the diagnosis of faults in analog circuits is still a complex task. Consequently, a technique for the fault diagnosis in analog circuits is designed by proposing a new optimization algorithm, named, rider optimization algorithm (ROA). The development of ROA is based on a group of riders, racing toward a target location. Moreover, a classifier, termed RideNN, is developed by including the proposed algorithm as the training algorithm for the neural network (NN). RideNN, along with the orthogonal transformation and Bhattacharyya coefficient, is applied for the fault diagnosis of analog circuits. The proposed technique is experimented using three basic circuits, such as triangular wave generator (TWG), low noise bipolar transistor amplifier (BTA), and differentiator (DIF) and an application circuit, solar power converter (SPC). The performance is evaluated using two evaluation metrics, namely, accuracy (ACC) and false alarm ratio (FAR). The analysis results show that the proposed technique attains an ACC of 99.9% in TWG, 99.9% in BTA, 99% in DIF, and 95% in SPC without noise.
Author Kariyappa, B. S
Binu, D.
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Snippet Fault diagnosis in electronic circuits is an emerging area of research, where fully automated diagnosis systems are being developed for the investigation of...
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SubjectTerms Algorithms
Analog circuits
Artificial neural networks
Bhattacharyya coefficient
Circuit design
Circuit faults
Circuits
classifier
Electronic circuits
False alarms
Fault diagnosis
Integrated circuit modeling
Low noise
Neural networks
Optimization
Optimization algorithms
orthogonal transformation
Power converters
Racing
Test procedures
Transistor amplifiers
Title RideNN: A New Rider Optimization Algorithm-Based Neural Network for Fault Diagnosis in Analog Circuits
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https://www.proquest.com/docview/2154028236
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